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Fractional spur reduction technique using 45° phase dithering in phase interpolator based all‐digital phase‐locked loop.

Authors :
Ko, J.
Heo, M.
Lee, J.
Kim, C.
Lee, M.
Source :
Electronics Letters (Wiley-Blackwell). Nov2016, Vol. 52 Issue 23, p1920-1922. 3p.
Publication Year :
2016

Abstract

A spur reduction technique in fractional‐N phase‐locked loops based on a current‐mode phase interpolator (CMPI) is presented by dithering input signals of the CMPI. CMPI shows deterministic phase error having symmetrical profile around 45° offset in each quadrant, and this non‐linear property leads to fractional spurs. The proposed 45° phase rotator with digital compensation reduces the fractional spur by 18.57 dB at most, and average improvement of fractional tones is 7.89 dB in 2 MHz frequency step measurement. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00135194
Volume :
52
Issue :
23
Database :
Academic Search Index
Journal :
Electronics Letters (Wiley-Blackwell)
Publication Type :
Academic Journal
Accession number :
148785446
Full Text :
https://doi.org/10.1049/el.2016.2098