Comparing techniques for spur reduction in digital bang‐bang PLLs.

Bang‐bang phase‐locked loops (PLLs) are prone to generate unwanted output spur tones and high noise floor. In this reported work, a spur reduction technique based on dithering is compared to an alternative technique which exploits oscillator intrinsic noise. It is shown how the latter, joined to a proper loop design, allows eliminating unwanted spur tones while yielding a lower noise floor. [ABSTRACT FROM AUTHOR]