A Low-Power VLSI Implementation of RFIR Filter Design using Radix-2 Algorithm with LCSLA.

MLA

Satish Reddy, Kasarla, and Hosahally Narayangowda Suresh. “A Low-Power VLSI Implementation of RFIR Filter Design Using Radix-2 Algorithm with LCSLA.” IETE Journal of Research, vol. 66, no. 6, Nov. 2020, pp. 741–50. EBSCOhost, https://doi.org/10.1080/03772063.2019.1620644.

APA

Satish Reddy, K., & Suresh, H. N. (2020). A Low-Power VLSI Implementation of RFIR Filter Design using Radix-2 Algorithm with LCSLA. IETE Journal of Research, 66(6), 741–750. https://doi.org/10.1080/03772063.2019.1620644

Chicago

Satish Reddy, Kasarla, and Hosahally Narayangowda Suresh. 2020. “A Low-Power VLSI Implementation of RFIR Filter Design Using Radix-2 Algorithm with LCSLA.” IETE Journal of Research 66 (6): 741–50. doi:10.1080/03772063.2019.1620644.