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An NMOS Digital LDO With NAND-Based Analog-Assisted Loop in 28-nm CMOS.

Authors :
Ma, Xiaofei
Lu, Yan
Li, Qiang
Ki, Wing-Hung
Martins, Rui P.
Source :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers. Nov2020, Vol. 67 Issue 11, p4041-4052. 12p.
Publication Year :
2020

Abstract

This paper presents an NMOS digital low-dropout regulator (LDO) with fast transient response and ultra-low quiescent current, to provide a tunable power supply for near-threshold voltage computing circuits in internet-of-things (IoT) devices. An LDO with an NMOS power transistor can enjoy the intrinsic fast transient response of the source-follower-like power stage, contributing to the proportional (P) part of the control loop. A shift-register-based digital control serves as an excellent candidate for the integral (I) part of the control loop. In addition, we propose a NAND-gate-based high-pass analog path (NAP) as the derivative (D) part of the loop, making the whole control scheme a complete PID control, therefore, achieving a fast transient response. We fabricated two versions of the prototype chip, one with a 35 pF on-chip load capacitor and a fast-transient on-chip load, and the other with no load capacitor, in 28-nm CMOS. The proposed NMOS digital LDO with NAP can handle the load transient of 160 mA/ns with 810-nA quiescent current, achieving 117-mV voltage undershoot. With the proposed techniques, we can achieve nearly two orders of better FoM when comparing it to the state-of-the-art works. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
15498328
Volume :
67
Issue :
11
Database :
Academic Search Index
Journal :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers
Publication Type :
Periodical
Accession number :
146782423
Full Text :
https://doi.org/10.1109/TCSI.2020.3009454