Reliability of Fine-Pitch <5-μm-Diameter Microvias for High-Density Interconnects.

Downscaling of package wiring has been the singular focus to achieve higher logic-memory interconnect density to meet next-generation needs for high-bandwidth computing. This article presents, for the first time, a systematic modeling and experimental study of sub-5- $\mu \text{m}$ -diameter microvia reliability. Geometry design considerations and build-up dielectric material properties in evaluating the microvia fatigue life are investigated. Finally, experimental thermal-cycling reliability results of sub-5- $\mu \text{m}$ -diameter microvias are correlated with the modeling results. [ABSTRACT FROM AUTHOR]