A new boosted charge-steering latch for high-speed low-power applications.

This paper presents a new high-speed low-power charge-steering latch, using a boosting technique for the tail capacitor, which is charged reversely in the reset phase. This technique decreases the source node voltage of the differential pair, which improves the output voltage swing. Analysis and post-layout simulation results of the proposed boosted charge-steering latch (BCS), in 65 nm CMOS technology, illustrate that for the same output swing and with about 28% tail capacitor of the conventional charge-steering latch, the maximum operating frequency is increased by about 12%. In the case of the same tail capacitor, the BCS latch gives the output swing of about 30% higher than that of conventional one for the low to moderate input swing, while its maximum operating frequency is about 20% higher. [ABSTRACT FROM AUTHOR]