Cite
Run-time demand estimation and modulation of on-chip decaps at system level for leakage power reduction in multicore chips.
MLA
Wang, Leilei, et al. “Run-Time Demand Estimation and Modulation of on-Chip Decaps at System Level for Leakage Power Reduction in Multicore Chips.” Integration: The VLSI Journal, vol. 65, Mar. 2019, pp. 322–30. EBSCOhost, https://doi.org/10.1016/j.vlsi.2018.01.009.
APA
Wang, L., Zhuo, C., & Zhou, P. (2019). Run-time demand estimation and modulation of on-chip decaps at system level for leakage power reduction in multicore chips. Integration: The VLSI Journal, 65, 322–330. https://doi.org/10.1016/j.vlsi.2018.01.009
Chicago
Wang, Leilei, Cheng Zhuo, and Pingqiang Zhou. 2019. “Run-Time Demand Estimation and Modulation of on-Chip Decaps at System Level for Leakage Power Reduction in Multicore Chips.” Integration: The VLSI Journal 65 (March): 322–30. doi:10.1016/j.vlsi.2018.01.009.