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SIMD stealing: Architectural support for efficient data parallel execution on multicores.

Authors :
Huang, Libo
Lü, Yashuai
Ma, Sheng
Xiao, Nong
Wang, Zhiying
Source :
Microprocessors & Microsystems. Mar2019, Vol. 65, p136-147. 12p.
Publication Year :
2019

Abstract

Abstract Single-instruction multiple-data (SIMD) architecture is a promising and widely used avenue for enhancing performance. Most of current multicore systems adopt this technique in which each core is equipped with an SIMD engine. However, these SIMD engines are frequently underutilized in single-thread applications. A typical reason is that only one SIMD engine can be utilized for a single thread, even if other SIMD engines are idle, and abundant data-level parallelism (DLP) can be exploited. To address this problem, we propose SIMD Stealing , which is an architectural support for multicore systems that provide the capability of dynamically adjusting the number of SIMD engines during application execution. This approach includes hardware modification and compilation extension, which can improve SIMD efficiency significantly in DLP applications. Experiment results show that SIMD stealing achieves an energy-delay product (EDP) reduction of approximately 53% for kernels and an EDP reduction of 34% for applications on average, with a small area overhead. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
01419331
Volume :
65
Database :
Academic Search Index
Journal :
Microprocessors & Microsystems
Publication Type :
Academic Journal
Accession number :
134688233
Full Text :
https://doi.org/10.1016/j.micpro.2018.12.001