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基于 FPGA 与 DDR3 缓存的 PAL 制式图像源产生模块设计与实现.

Authors :
杨文豪
倪文龙
付强
孙舟
郭奇
钱宏文
Source :
Research & Exploration in Laboratory. 2018, Vol. 37 Issue 11, p96-99. 4p.
Publication Year :
2018

Abstract

To realize rapid test of the key performance of the products in the environment test, and simulate a 4-channel PAL camera output in parallel, an image source generating module based on FPGA and DDR3 was designed. The YCrCb format image source was encoded according to ITU-RBT. 656 standard, and the ADV7393 chip was used to realize the PAL format conversion, the DDR3-SDRAM stored and outputted data by a method of partition storage and pipelined rotation. It has been proved that the module can effectively output 4 image sources in parallel, and by circuit expansion, the test efficiency can be strongly improved. [ABSTRACT FROM AUTHOR]

Details

Language :
Chinese
ISSN :
10067167
Volume :
37
Issue :
11
Database :
Academic Search Index
Journal :
Research & Exploration in Laboratory
Publication Type :
Academic Journal
Accession number :
133673213