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Comprehensive Analysis of Distortion in the Passive FET Sample-and-Hold Circuit.
- Source :
-
IEEE Transactions on Circuits & Systems. Part I: Regular Papers . Apr2018, Vol. 65 Issue 4, p1157-1173. 17p. - Publication Year :
- 2018
-
Abstract
- Analysis simplified with circuit insights reveals the major sources of distortion in a passive FET-switch-based sampling circuit: 1) R\mathrm{\scriptscriptstyle ON} -modulation; 2) turn-OFF-time instant; and 3) signal-dependent charge-injection. Explicit expressions for second- and third-order distortions advance intuitive understanding of the processes of distortion. Circuit simulations and measurement results establish the accuracy of the analysis. Since the three sources of distortion each have a unique dependence on circuit parameters and the input signal frequency, a systematic method is shown to optimize an S/H circuit for least distortion. [ABSTRACT FROM AUTHOR]
- Subjects :
- *FIELD-effect transistors
*SAMPLE & hold circuits
*ELECTRIC distortion
Subjects
Details
- Language :
- English
- ISSN :
- 15498328
- Volume :
- 65
- Issue :
- 4
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Circuits & Systems. Part I: Regular Papers
- Publication Type :
- Periodical
- Accession number :
- 128463002
- Full Text :
- https://doi.org/10.1109/TCSI.2018.2797987