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Selection of test paths for solder joint intermittent connection faults under DC stimulus.

Authors :
Huakang, Li
Kehong, Lv
Jing, Qiu
Guanjun, Liu
Bailiang, Chen
Source :
International Journal of Electronics. Jun2018, Vol. 105 Issue 6, p1011-1024. 14p.
Publication Year :
2018

Abstract

The test path of solder joint intermittent connection faults under direct-current stimulus is examined in this paper. According to the physical structure of the circuit, a network model is established first. A network node is utilised to represent the test node. The path edge refers to the number of intermittent connection faults in the path. Then, the selection criteria of the test path based on the node degree index are proposed and the solder joint intermittent connection faults are covered using fewer test paths. Finally, three circuits are selected to verify the method. To test if the intermittent fault is covered by the test paths, the intermittent fault is simulated by a switch. The results show that the proposed method can detect the solder joint intermittent connection fault using fewer test paths. Additionally, the number of detection steps is greatly reduced without compromising fault coverage. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00207217
Volume :
105
Issue :
6
Database :
Academic Search Index
Journal :
International Journal of Electronics
Publication Type :
Academic Journal
Accession number :
128103905
Full Text :
https://doi.org/10.1080/00207217.2018.1426049