A high-performance channel engineered charge-plasma-based MOSFET with high-κ spacer.

In this paper, the performance of graded channel double-gate MOSFET (GC-DGFET) that utilizes the charge-plasma concept and a high-κ spacer is investigated through 2-D device simulations. The results demonstrate that GC-DGFET with high-κ spacer can effectively improve the ON-state driving current ( I ON ) and reduce the OFF-leakage current ( I OFF ). We find that reduction of the initial energy barrier between the source and channel is the origin of this I ON enhancement. The reason for the I OFF reduction is identified to be the extension of the effective channel length owing to the fringing field via high-κ spacers. Consequently, these devices offer enhanced performance by reducing the total gate-to-gate capacitance ( C gg ) and decreasing the intrinsic delay (τ). [ABSTRACT FROM AUTHOR]