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Solution-processed HfGdO gate dielectric thin films for CMOS application: Effect of annealing temperature.

Authors :
Li, W.D.
He, G.
Zheng, C.Y.
Liang, S.
Zhu, L.
Jiang, S.S.
Source :
Journal of Alloys & Compounds. Jan2018, Vol. 731, p150-155. 6p.
Publication Year :
2018

Abstract

Annealing temperature dependent microstructure, optical and electrical properties of sol-gel-deposited HfGdO high-k gate dielectric thin films on Si substrates are systematically investigated. X-ray spectroscopy (XPS) analyses have confirmed that the interfacial layer at HfGdO/Si interface is mainly silicate and the component increases with increasing the annealing temperature. Moreover, the band offsets for HfGdO/Si gate stack as a function of annealing temperature also have been determined. As a result, it can be noted that increase in valence band offset (Δ E v ) and reduction in conduction band offset (Δ E c ) have been detected. Electrical characterizations have indicated that higher annealing temperature effectively improves the electrical characteristics, such as the increased effective permittivity ( k ) and the decreased flat band voltage shift (Δ V fb ). However, due to the reduced Δ E c and the appearance of crystallization, increased leakage current density has been observed with the increase in annealing temperature. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
09258388
Volume :
731
Database :
Academic Search Index
Journal :
Journal of Alloys & Compounds
Publication Type :
Academic Journal
Accession number :
126163165
Full Text :
https://doi.org/10.1016/j.jallcom.2017.10.019