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A Novel High Linearity and Low Power Folded CMOS LNA for UWB Receivers.
- Source :
-
Journal of Circuits, Systems & Computers . Mar2018, Vol. 27 Issue 3, p-1. 19p. - Publication Year :
- 2018
-
Abstract
- This paper presents a high linearity and low power Low-Noise Amplifier (LNA) for Ultra-Wideband (UWB) receivers based on CHRT 0.18m Complementary Metal-Oxide-Semiconductor (CMOS) technology. In this work, the folded topology is adopted in order to reduce the supply voltage and power consumption. Moreover, a band-pass LC filter is embedded in the folded-cascode circuit to extend bandwidth. The transconductance nonlinearity has a great impact on the whole LNA linearity performance under a low supply voltage. A post-distortion (PD) technique employing an auxiliary transistor is applied in the transconductance stage to improve the linearity. The post-layout simulation results indicate that the proposed LNA achieves a maximum power gain of 12.8dB. The input and output reflection coefficients both are lower than dB over 2.5-11.5GHz. The input third-order intercept point (IIP3) is 5.6dBm at 8GHz and the noise figure (NF) is lower than 4.0dB. The LNA consumes 5.4mW power under a 1V supply voltage. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 02181266
- Volume :
- 27
- Issue :
- 3
- Database :
- Academic Search Index
- Journal :
- Journal of Circuits, Systems & Computers
- Publication Type :
- Academic Journal
- Accession number :
- 125950105
- Full Text :
- https://doi.org/10.1142/S0218126618500470