A High Bandwidth (DC-40 GHz) Pseudo Differential Distributed Amplifier in 0.18-m RF CMOS.

This study presents a CMOS distributed amplifier (DA) with pseudo differential amplifying that achieves DC-40GHz bandwidth (BW) in 0.18-m RF CMOS process. The DA with three-stage amplifying cells was proposed to improve the DA performance. The inter-stage was composed of pseudo differential amplifying for bandwidth extension. By incorporating the pseudo differential amplifier configuration and capacitor-less circuit in the stages, the DA provides average gain and high bandwidth. The simulation results showed that the DA has a S of 6.4dB, 3-dB BW from DC up to 40GHz. It also has a minimum noise figure (NF) of 4.27dB, one dB compression point (P of 3.5dBm, a high reverse isolation S of less than 15dB, an input return loss S and output return loss S of less than 16 and 12dB, respectively. It consumes 115mW and occupies a total active area of 0.27mm2. [ABSTRACT FROM AUTHOR]