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Wafer level high-density trench capacitors by using a two-step trench-filling process.

Authors :
Zheng, Tao
Xu, Gaowei
Luo, Le
Source :
Microsystem Technologies. Feb2017, Vol. 23 Issue 2, p399-404. 6p.
Publication Year :
2017

Abstract

This paper reports on the design, fabrication and electrical characterization of high-density SIS trench capacitors by using a two-step deposition process for fast-filling the deep trenches. LPCVD silicon nitride is employed as the dielectric material to provide high efficiency deposition in the high aspect ratio trenches. The capacitance density in trench capacitors with 25 nm thick SiN is characterized as high as 57.8 nF/mm, while the breakdown voltage in trench capacitors with 35 nm thick SiN is recorded to be as high as 14.5 V. Furthermore, the capacitances are measured over an applied voltage range from −5 to 5 V, showing a small voltage-dependence of 1.2 and 0.6 % V for the 25 and 35 nm thick SiN trench capacitor, respectively. The leakage currents are measured and the current transport mechanisms are analyzed. The ESR and ESL of the capacitors with 25 and 35 nm thick SiN are very small, as low as 35-65 mΩ and 0.2-0.28 pH for 0.04 mm electrode surface. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
09467076
Volume :
23
Issue :
2
Database :
Academic Search Index
Journal :
Microsystem Technologies
Publication Type :
Academic Journal
Accession number :
121198192
Full Text :
https://doi.org/10.1007/s00542-015-2681-6