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Reconfigurable ultra-thin film GDNMOS device for ESD protection in 28 nm FD-SOI technology.

Authors :
Legrand, Charles-Alexandre
Galy, Philippe
Athanasiou, Sotirios
Cristoloveanu, Sorin
Source :
Solid-State Electronics. Feb2017, Vol. 128, p172-179. 8p.
Publication Year :
2017

Abstract

We propose a novel ESD protection device (GDNMOS: Gated Diode merged NMOS) fabricated with 28 nm UTBB FD-SOI high-k metal gate technology. By modifying the combination of the diode and transistor gate stacks, the robustness of the device is optimized, achieving a maximum breakdown voltage (V BR ) of 4.9 V. In addition, modifications of the gate length modulate the trigger voltage (V t1 ) with a minimum value of 3.5 V. Variable electrostatic doping (gate-induced) in diode and transistor body enables reconfigurable operation. A lower doping of the base enhances the bipolar gain, leading to thyristor behavior. This innovative architecture demonstrates excellent capability for high-voltage protection while maintaining a latch-up free behavior. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00381101
Volume :
128
Database :
Academic Search Index
Journal :
Solid-State Electronics
Publication Type :
Academic Journal
Accession number :
120403063
Full Text :
https://doi.org/10.1016/j.sse.2016.10.026