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A clock synchronization method for EtherCAT master.

Authors :
Chen, Xin
Li, Di
Wan, Jiafu
Zhou, Nan
Source :
Microprocessors & Microsystems. Oct2016 Part B, Vol. 46, p211-218. 8p.
Publication Year :
2016

Abstract

EtherCAT has been widely applied in the motion control domain due to its advantages of the fast response speed, low CPU usage and good synchronization performance. Although the built-in distributed clock (DC) synchronization mechanism exhibits strong performance between slaves, the method of clock synchronization between the master and the reference clock is left open for selection by users and there are very few studies in this area. This paper introduces three synchronization modes for EtherCAT and analyzes the reasons for packet loss in free run mode and DC mode. This paper presents a novel method to realize the master clock synchronization with the reference clock. The proposed method can eliminate the settling time which is unusual in other synchronization mechanisms. The method is implemented on Windows with real-time extension and experimental results prove its feasibility. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
01419331
Volume :
46
Database :
Academic Search Index
Journal :
Microprocessors & Microsystems
Publication Type :
Academic Journal
Accession number :
119776582
Full Text :
https://doi.org/10.1016/j.micpro.2016.03.002