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Quantization Noise Analysis of Time-to-Digital-Converter-Based All-Digital Phase-Locked Loop and Frequency Discriminators.
- Source :
-
Journal of Circuits, Systems & Computers . Nov2016, Vol. 25 Issue 11, p-1. 11p. - Publication Year :
- 2016
-
Abstract
- All-digital phase-locked loops (ADPLLs) based on the time-to-digital converter (TDC) and the frequency discriminator (FD) are modeled and analyzed in terms of quantization effects. Using linear models with quantization noise sources, theoretical analysis and simulation are carried out to obtain the output phase noise of each building block of the TDC-based ADPLL. It is newly derived that the TDC noise component caused by the delta-sigma modulator (DSM) and the finite resolution of the digitally controlled oscillator is not white. Namely, the in-band phase noise caused by the DSM-induced TDC is not white, which is due to the integrate-and-dump and subsampling operations of the TDC. This can give some insight into the design of low-noise ADPLLs. Some structures of delta-sigma FDs, which can serve as an alternative to the TDC, are also newly analyzed in terms of quantization noise, using the derived linear noise model. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 02181266
- Volume :
- 25
- Issue :
- 11
- Database :
- Academic Search Index
- Journal :
- Journal of Circuits, Systems & Computers
- Publication Type :
- Academic Journal
- Accession number :
- 117760818
- Full Text :
- https://doi.org/10.1142/S0218126616501310