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Surrogating circuit design solutions with robustness metrics.

Authors :
Sun, Jin
Xiao, Liang
Tian, Jiangshan
Zhou, He
Roveda, Janet
Source :
Integration: The VLSI Journal. Jan2016, Vol. 52, p1-9. 9p.
Publication Year :
2016

Abstract

With the increase in device variability, the performance uncertainty poses a daunting challenge to analog/mixed-signal circuit design. This situation requires a robust design approach to add large margins to the circuit and system-level specification to ensure correct operation and the overall yield. In this paper, we propose a new robust design approach by using norm metrics to quantify the robustness for both design parameters and performance uncertainty. In addition, we adopt a surrogating procedure to achieve robustness in design space and to reduce uncertainty in performance space. The end result of the proposed method is a Pareto-surface that provides the designer with trade-offs between design robustness and performance uncertainty. One advantage of this new approach is the ability to take into account the strong nonlinear relationship between performance and design parameters. Considering a set of highly nonlinear circuit performances, we demonstrate the effectiveness of this robust design framework on a fully CMOS operational amplifier circuit. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
01679260
Volume :
52
Database :
Academic Search Index
Journal :
Integration: The VLSI Journal
Publication Type :
Academic Journal
Accession number :
111409416
Full Text :
https://doi.org/10.1016/j.vlsi.2015.07.015