Linear Time-Variant Modeling and Analysis of All-Digital Phase-Locked Loops.

MLA

Syllaios, I. L., and P. T. Balsara. “Linear Time-Variant Modeling and Analysis of All-Digital Phase-Locked Loops.” IEEE Transactions on Circuits & Systems. Part I: Regular Papers, vol. 59, no. 11, Nov. 2012, pp. 2495–506. EBSCOhost, https://doi.org/10.1109/TCSI.2012.2189061.

APA

Syllaios, I. L., & Balsara, P. T. (2012). Linear Time-Variant Modeling and Analysis of All-Digital Phase-Locked Loops. IEEE Transactions on Circuits & Systems. Part I: Regular Papers, 59(11), 2495–2506. https://doi.org/10.1109/TCSI.2012.2189061

Chicago

Syllaios, I. L., and P. T. Balsara. 2012. “Linear Time-Variant Modeling and Analysis of All-Digital Phase-Locked Loops.” IEEE Transactions on Circuits & Systems. Part I: Regular Papers 59 (11): 2495–2506. doi:10.1109/TCSI.2012.2189061.