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Ubiquitous electronic gadgets in lives have led to an increase in electronic waste (e‐waste), posing a threat to the environment and ecology that must be addressed. This work demonstrates the use of gelatin, a natural protein, for development of flexible biodegradable substrates and synaptic transistors using the same material as gate dielectric. The fabricated p‐channel transistors exhibit high electrical stability and exceptional synaptic characteristics through spike timing dependent plasticity (STDP), spike voltage dependent plasticity (SVDP), and spike number dependent plasticity (SNDP), respectively upon variation of post‐synaptic current (PSC) with time, amplitude, and number of stimuli. These devices exhibit pulse paired facilitation (PPF) with relaxation time constants in the range of ≈10 ms and regulating modulation amplitude of 1 greatly resembling a biological synapse. Study on the variability among distinct devices and over multiple cycles demonstrate outstanding repeatability of synaptic plasticity. The devices showcase significant PSC values with almost linear SNDP, while consuming an ultralow power of ≈11.7 fJ. Excellent stability is observed when subjected to multiple bending sequences. Complete dissolution of these devices in aqueous environments in an hour without any alteration to temperature or pH confirms excellent biodegradability of these devices leading toward transient neuromorphic circuits and systems that adhere to the concepts of circular economy. [ABSTRACT FROM AUTHOR]

Neuromorphic computing, inspired by the functionality of biological neural networks, has emerged as a promising paradigm for artificial intelligence applications, especially in the field of flexible electronics. Among the various artificial synaptic devices, floating‐gate synaptic transistors exhibit long‐term synaptic plasticity, but they face the challenge of achieving flexible compatibility. In this work, the first demonstration of a flexible MXene floating‐gate synaptic transistor is reported, which uses multiple layers of MXene as floating gates and MXene nanosheets as charge state modulators. The device shows excellent mechanical flexibility and can operate at low voltages, which improves its suitability for wearable electronic devices. It can also emulate Pavlovian conditioned reflexes under external stress, suggesting its potential for cognitive learning. Moreover, the device is utilized for handwritten digit recognition by simulating a fully connected neural network, achieving a high recognition accuracy of 92.0%. This demonstrates its practical applicability in neuromorphic computing. Besides, this research achieves the patterning of MXene and its application in flexible floating‐gate transistors. It provides a new solution for the integrated fabrication of flexible artificial synaptic devices. [ABSTRACT FROM AUTHOR]

Exploiting simulation modeling of graphene synaptic field‐effect transistors is extremely important for helping researchers to construct carbon‐based neuromorphic computing systems. Here, lateral‐ionic‐gated graphene synaptic FETs with different gate lengths are fabricated, and they are modeled by using basic physic models combined with the ions migration‐diffusion model and graphene material model. The feasibility and accuracy of the proposed modeling are validated by showing an excellent agreement between simulations and experimental results. The slicing technique of the modeling is proposed to analyze the influence of ionic concentration and diffusion coefficient on the ions movement to reveal their working mechanism. The effect of key parameters about gate length, ionic concentration, and diffusion coefficient on synaptic behavior such as short‐term plasticity, and long‐term plasticity is simulated and discussed. In addition, three kinds of spike‐timing‐dependent plasticity are obtained by the device modeling. This research opens up promising avenues for the development of artificial synapse modeling and paths to new opportunities for the construction of carbon‐based neuromorphic networks. [ABSTRACT FROM AUTHOR]

2D platinum diselenide (PtSe2), a novel member of the transition metal dichalcogenides (TMDCs) family, possesses many excellent properties, including a layer‐dependent bandgap, high carrier mobility, and broadband response, making it promise for applications in technologies like field‐effect transistors and room‐temperature photodetectors. Doping represents an effective method to modify the electrical properties of 2D TMDCs and to bestow upon them additional functions. However, to date, little research has been conducted on the successful doping of 2D PtSe2 for modification. In this study, sulfur (S) powder is utilized during the chemical vapor deposition growth process of 2D PtSe2 ribbons and successfully integrated into the PtSe2 lattice through substitutional doping. The Au substrate significantly decreases the substitution energy of Se atoms in the lower layer of PtSe2, resulting in the formation of the Janus PtSSe structure. S‐doped PtSe2 ribbons demonstrate significant symmetry breaking and enhanced electrical properties, showcasing a strong nonlinear optical response and certain synaptic plasticity, further simulating some neuromorphological processes. This study not only demonstrates a viable method for controllable doping and modification of 2D PtSe2 but also establishes a platform for exploring the characteristics of Janus TMDCs. [ABSTRACT FROM AUTHOR]

Neurons are the basic units of the human brain that receive and process external stimuli. The synapse is a vital part of the connection between neurons. Short‐term plasticity (STP) allows synapses to perform neural signal processing and neural computation. Herein, low‐voltage (1 V) electrical‐double‐layer (EDL) p‐channel CuI neuromorphic transistors are fabricated by a simple solution method to mimic this type of synaptic function, and chitosan is used as the gate dielectric. It exhibits short‐term memory functions similar to biological synapses. Its electrical properties and STP by electrical impulses are investigated. A current on/off ratio of 2 × 104, a subthreshold swing of 82 mV dec−1, and a saturation field‐effect mobility of 0.12 cm2 V−1 s−1 are obtained in this synaptic transistor. Such low‐voltage EDL p‐type CuI thin‐film transistors gated by chitosan can be used as artificial synapses, and excitatory postsynaptic current and STP function analogous to human learning behavior are demonstrated. In these results, new ways are provided to enhance the functionality of next‐generation synaptic devices. [ABSTRACT FROM AUTHOR]

Synaptic transistors with low-temperature, solution-processed dielectric films have demonstrated programmable conductance, and therefore potential applications in hardware artificial neural networks for recognizing noisy images. Here, we engineered AlOx/InOx synaptic transistors via a solution process to instantiate neural networks. The transistors show long-term potentiation under appropriate gate voltage pulses. The artificial neural network, consisting of one input layer and one output layer, was constructed using 9 × 3 synaptic transistors. By programming the calculated weight, the hardware network can recognize 3 × 3 pixel images of characters z, v and n with a high accuracy of 85%, even with 40% noise. This work demonstrates that metal-oxide transistors, which exhibit significant long-term potentiation of conductance, can be used for the accurate recognition of noisy images. [ABSTRACT FROM AUTHOR]

Abstract Exploiting simulation modeling of graphene synaptic field‐effect transistors is extremely important for helping researchers to construct carbon‐based neuromorphic computing systems. Here, lateral‐ionic‐gated graphene synaptic FETs with different gate lengths are fabricated, and they are modeled by using basic physic models combined with the ions migration‐diffusion model and graphene material model. The feasibility and accuracy of the proposed modeling are validated by showing an excellent agreement between simulations and experimental results. The slicing technique of the modeling is proposed to analyze the influence of ionic concentration and diffusion coefficient on the ions movement to reveal their working mechanism. The effect of key parameters about gate length, ionic concentration, and diffusion coefficient on synaptic behavior such as short‐term plasticity, and long‐term plasticity is simulated and discussed. In addition, three kinds of spike‐timing‐dependent plasticity are obtained by the device modeling. This research opens up promising avenues for the development of artificial synapse modeling and paths to new opportunities for the construction of carbon‐based neuromorphic networks.

We demonstrate an InGaZnO (IGZO)-based synaptic transistor with a TiO2 buffer layer. The structure of the synaptic transistor with TiO2 inserted between the Ti metal electrode and an IGZO semiconductor channel O2 trapping layer produces a large hysteresis window, which is crucial for achieving synaptic functionality. The Ti/TiO2/IGZO synaptic transistor exhibits reliable synaptic plasticity features such as excitatory post-synaptic current, paired-pulse facilitation, and potentiation and depression, originating from the reversible charge trapping and detrapping in the TiO2 layer. Finally, the pattern recognition accuracy of Modified National Institute of Standards and Technology handwritten digit images was modeled using CrossSim simulation software. The simulation results present a high image recognition accuracy of ∼89%. Therefore, this simple approach using an oxide buffer layer can aid the implementation of high-performance synaptic devices for neuromorphic computing systems. [ABSTRACT FROM AUTHOR]

Polymer electret synaptic transistor is a promising three‐terminal artificial synaptic device. In this work, the electrical characteristics of the composite insulator and transistor are enhanced by modulating the concentration of the 2D nanofiller graphene oxide (GO) and the stacked film structure based on a polyvinyl alcohol (PVA) matrix. The GO‐PVA/PVA polymer electret synaptic transistors before and after dynamic/static bending exhibit typical synaptic characteristics, including short‐term plasticity, long‐term plasticity, pair‐pulse facilitation, spike‐timing‐dependent plasticity, and "learning–forgetting–relearning" features. Importantly, the device exhibits good cycling stability, uniformity and linearity in the potentiation‐depression cycling test, which is beneficial for improving the accuracy of neuromorphic computations. Also, it shows extremely low energy consumption (≈0.32 fJ). The recognition accuracy of images is simulated based on the constructed artificial neural network, which achieves 86.8% for the MNIST dataset. In addition, the devices maintain high recognition accuracy after dynamic/static bending, indicating that the devices are extremely bend‐resistant. The GO‐PVA/PVA polymer electret synaptic transistor is expected to be a potential candidate for neuromorphic computations and electronic skin. [ABSTRACT FROM AUTHOR]

The inhomogeneous native oxide shells on the surfaces of III–V group semiconductors typically yield inferior and unstable electrical properties metrics, challenging the development of next‐generation integrated circuits. Herein, the native GaOx shells are profitably utilized by a simple in‐situ thermal annealing process to achieve high‐performance GaSb nanowires (NWs) field‐effect‐transistors (FETs) with excellent bias‐stress stability and synaptic behaviors. By an optimal annealing time of 5 min, the as‐constructed GaSb NW FET demonstrates excellent stability with a minimal shift of transfer curve (ΔVth ≈ 0.54 V) under a 60 min gate bias, which is far more stable than that of pristine GaSb NW FET (ΔVth ≈ 8.2 V). When the high bias‐stress stability NW FET is used as the chargeable‐dielectric free synaptic transistor, the typical synaptic behaviors, such as short‐term plasticity, long‐term plasticity, spike‐time‐dependent plasticity, and reliable learning stability are demonstrated successfully through the voltage tests. The mobile oxygen ion in the native GaOx shell strongly offsets the trapping states and leads to enhanced bias‐stress stability and charge retention capability for synaptic behaviors. This work provides a new way of utilizing the native oxide shell to realize stable FET for chargeable‐dielectric free neuromorphic computing systems. [ABSTRACT FROM AUTHOR]

One of the emerging paradigms to resolve pressing issues of modern computing electronics, such as limits in miniaturization and excessive energy consumption, takes inspiration from the biological brain and is therefore expected to display some of its properties, such as energy efficiency and effective learning. Moreover, one of the brain's remarkable properties is its ability to process complex information by resolving it on different timescales. In synapse‐emulating artificial devices, some form of memory (e.g., hysteresis in current–voltage characteristics) is required. One of the important characteristics of biological synapses is the coexistence of short‐ and long‐term memory, also called plasticity. However, a broader exploration of memory at multiple timescales in materials remains limited. Herein, the first example of synaptic transistors utilizing colloidal quantum dots (CQDs) as active material is reported. It is demonstrated that PbS‐CQDs, with metal halide and perovskite‐like ligands, are ideal as an active material for synaptic transistors exhibiting both short‐ and long‐term plasticity. Most interestingly, by changing the chemistry of the quantum dot outer monolayer, a drastic change in the temporal response of the learning is observed, demonstrating the possibility of engineering materials exhibiting learning at multiple timescales, similar to the biological synapses. [ABSTRACT FROM AUTHOR]

Emerging technologies such as neuromorphic computing and nonvolatile memories based on floating gate field-effect transistors (FETs) hold promise for addressing a wide range of artificial intelligence tasks. For example, neuromorphic computing seeks to emulate the human brain's functionality and employs a device that mimics the role of a synapse in the brain. However, achieving a high current ON/OFF ratio for the program and erase states of nonvolatile memory and neuromorphic computing device with a metal gate is necessary. This study demonstrates a multi-functional device based on heterostructures of transition metal dichalcogenides (TMDCs) with a metal floating gate. Five different channel materials (SnS2, WSe2, MoS2, WS2, and MoTe2) were employed, and hexagonal boron nitride (h-BN) was used as a tunneling layer. The study found that n-type SnS2 exhibits high endurance (15,000 cycles), good retention (2.4 × 105 s), and the highest current ON/OFF ratio (∼2.58 × 108) among the materials for the program and erase states. Moreover, the SnS2 device exhibits synaptic behavior and offers highly stable operation at room temperature. Furthermore, the device shows high linearity in both potentiation and depression, with good retention time and repeatable results with low cycle-to-cycle variations. Additionally, the study used an artificial neural network (ANN) for MNIST simulation of image recognition and achieved the highest accuracy of ∼92 % based on the SnS2 synaptic device experimental results. These findings pave the way for developing nonvolatile memory devices and their applications in brain-inspired neuromorphic computing and artificial intelligence systems.

Abstract The inhomogeneous native oxide shells on the surfaces of III–V group semiconductors typically yield inferior and unstable electrical properties metrics, challenging the development of next‐generation integrated circuits. Herein, the native GaOx shells are profitably utilized by a simple in‐situ thermal annealing process to achieve high‐performance GaSb nanowires (NWs) field‐effect‐transistors (FETs) with excellent bias‐stress stability and synaptic behaviors. By an optimal annealing time of 5 min, the as‐constructed GaSb NW FET demonstrates excellent stability with a minimal shift of transfer curve (ΔVth ≈ 0.54 V) under a 60 min gate bias, which is far more stable than that of pristine GaSb NW FET (ΔVth ≈ 8.2 V). When the high bias‐stress stability NW FET is used as the chargeable‐dielectric free synaptic transistor, the typical synaptic behaviors, such as short‐term plasticity, long‐term plasticity, spike‐time‐dependent plasticity, and reliable learning stability are demonstrated successfully through the voltage tests. The mobile oxygen ion in the native GaOx shell strongly offsets the trapping states and leads to enhanced bias‐stress stability and charge retention capability for synaptic behaviors. This work provides a new way of utilizing the native oxide shell to realize stable FET for chargeable‐dielectric free neuromorphic computing systems.

One of the emerging paradigms to resolve pressing issues of modern computing electronics, such as limits in miniaturization and excessive energy consumption, takes inspiration from the biological brain and is therefore expected to display some of its properties, such as energy efficiency and effective learning. Moreover, one of the brain's remarkable properties is its ability to process complex information by resolving it on different timescales. In synapse‐emulating artificial devices, some form of memory (e.g., hysteresis in current–voltage characteristics) is required. One of the important characteristics of biological synapses is the coexistence of short‐ and long‐term memory, also called plasticity. However, a broader exploration of memory at multiple timescales in materials remains limited. Herein, the first example of synaptic transistors utilizing colloidal quantum dots (CQDs) as active material is reported. It is demonstrated that PbS‐CQDs, with metal halide and perovskite‐like ligands, are ideal as an active material for synaptic transistors exhibiting both short‐ and long‐term plasticity. Most interestingly, by changing the chemistry of the quantum dot outer monolayer, a drastic change in the temporal response of the learning is observed, demonstrating the possibility of engineering materials exhibiting learning at multiple timescales, similar to the biological synapses.

Developing electronic devices capable of reproducing synaptic functionality is essential in the context of implementing fast, low‐energy consumption neuromorphic computing systems. Hybrid ionic/electronic three‐terminal synaptic transistors are promising as efficient artificial synapses since they can process information and learn simultaneously. In this work, an electrolyte‐gated synaptic transistor is reported based on an ultra‐thin epitaxial La0.7Sr0.3MnO3 (LSMO) film, a half‐metallic system close to a metal‐insulator transition. The dynamic control of oxygen composition of the manganite ultra‐thin film with voltage pulses applied through the gate terminal allows reversible modulation of its electronic properties in a non‐volatile manner. The conductance modulation can be finely tuned with the amplitude, duration, and number of gating pulses, providing different alternatives to gradually update the synaptic weights. The transistor implements essential synaptic features such as excitatory postsynaptic potential, paired‐pulse facilitation, long‐term potentiation/depression of synaptic weights, and spike‐time‐dependent plasticity. These results constitute an important step toward the development of neuromorphic computing devices leveraging the tunable electronic properties of correlated oxides, and pave the way toward enhancing future device functionalities by exploiting the magnetic (spin) degree of freedom of the half metallic transistor channel. [ABSTRACT FROM AUTHOR]

Neuromorphic perceptual system (NPS) is inspired by the interaction between organisms and environment, which has boosted many emerging fields like human–machine interfaces and bionic robots. Laser‐induced graphene (LIG) can be a fast, low cost, and accurate patterning technology toward a flexible and biological plausible NPS. While, to unleash the full potential of LIG, thorny issues like low endurance and limited stretchability should be addressed. Herein, high‐performance ultraviolet LIG (UV‐LIG) based sensors and electrodes are introduced for building flexible artificial sensory neuron (ASN). The UV‐LIG can be fabricated with a fine linewidth of ≈75 µm and a high conductivity of 3900 ± 150 S cm−1, which facilitates the demonstration of LIG toolbox, containing bending sensors, flexible heaters, etc. The transferred LIG electrodes retain good conducting property (only ≈12.7% increment in resistance) and enable large stretchability (up to 150% strain), outperforming most of the LIG‐based strain sensors. As a proof‐of‐concept, an artificial sensory neuron that is able to mimic the strain perception of somatosensory system is realized based on the integration of LIG‐based functional components and an InGaZnO (Indium‐Gallium‐Zinc Oxide, IGZO)‐based synaptic transistor. This work can provide an efficient patterning methodology as well as essential components for neuromorphic perceptual systems. [ABSTRACT FROM AUTHOR]

Among various types of neuromorphic devices toward artificial intelligence, the electrochemical synaptic transistor emerges, in which the channel conductance is modulated by the insertion of ions according to the history of gate voltage across the electrolyte. Despite the striking progress in exploring novel channel materials, few studies report on the ferromagnetic metal‐based synaptic transistors, limiting the development of spin‐based neuromorphic devices. Herein, synaptic modulation of both conductivity and magnetism based on an electrochemical transistor with a metallic channel of ferromagnetic CoPt alloy is presented. Its essential synaptic functionalities in the transistor are demonstrated, including depression and potentiation of synaptic weight and paired‐pulse facilitation (PPF). Then, short‐to‐long‐term plasticity transition induced by different gate parameters, such as amplitude, duration, and frequency, is shown. Furthermore, the device presents multilevel and reversible nonvolatile states in both conductivity and coercivity. The results demonstrate simultaneous modulation of conductivity and magnetism, paving the way for building future spin‐based multifunctional synaptic devices. [ABSTRACT FROM AUTHOR]

Brain‐inspired neuromorphic computing has drawn significant attraction as a promising technology beyond von Neumann architecture by using the parallel structure of synapses and neurons. Various artificial synapse configurations and materials have been proposed to emulate synaptic behaviors for human brain functions such as memorizing, learning, and visual processing. Especially, the memory type indium‐gallium‐zinc‐oxide (IGZO) synaptic transistor adopting a charge trapping layer (CTL) has the advantages of high stability and a low leakage current of the IGZO channel. However, the CTL material should be carefully selected and optimized to overcome the low de‐trapping efficiency, resulting from difficulty in inducing holes in the IGZO channel. In this paper, IGZO is adopted as a CTL and found out that making it degenerated is crucial to improving de‐trapping efficiency. The degenerate CTL, where electrons remain as free electrons, induces Fowler‐Nordheim tunneling by increasing the electric field across the tunneling layer. As a result, the synaptic transistor represents a high linearity of potentiation (αp: −0.03) and depression (αd: −0.47) with 64 conductance levels, which enables the spiking neural network simulation to achieve high accuracy of 98.08%. These experimental results indicate that the synapse transistor can be one of the promising candidates for neuromorphic applications. [ABSTRACT FROM AUTHOR]

Future brain–computer interfaces will require local and highly individualized signal processing of fully integrated electronic circuits within the nervous system and other living tissue. New devices will need to be developed that can receive data from a sensor array, process these data into meaningful information, and translate that information into a format that can be interpreted by living systems. Here, the first example of interfacing a hardware‐based pattern classifier with a biological nerve is reported. The classifier implements the Widrow–Hoff learning algorithm on an array of evolvable organic electrochemical transistors (EOECTs). The EOECTs' channel conductance is modulated in situ by electropolymerizing the semiconductor material within the channel, allowing for low voltage operation, high reproducibility, and an improvement in state retention by two orders of magnitude over state‐of‐the‐art OECT devices. The organic classifier is interfaced with a biological nerve using an organic electrochemical spiking neuron to translate the classifier's output to a simulated action potential. The latter is then used to stimulate muscle contraction selectively based on the input pattern, thus paving the way for the development of adaptive neural interfaces for closed‐loop therapeutic systems. [ABSTRACT FROM AUTHOR]

Abstract Developing electronic devices capable of reproducing synaptic functionality is essential in the context of implementing fast, low‐energy consumption neuromorphic computing systems. Hybrid ionic/electronic three‐terminal synaptic transistors are promising as efficient artificial synapses since they can process information and learn simultaneously. In this work, an electrolyte‐gated synaptic transistor is reported based on an ultra‐thin epitaxial La0.7Sr0.3MnO3 (LSMO) film, a half‐metallic system close to a metal‐insulator transition. The dynamic control of oxygen composition of the manganite ultra‐thin film with voltage pulses applied through the gate terminal allows reversible modulation of its electronic properties in a non‐volatile manner. The conductance modulation can be finely tuned with the amplitude, duration, and number of gating pulses, providing different alternatives to gradually update the synaptic weights. The transistor implements essential synaptic features such as excitatory postsynaptic potential, paired‐pulse facilitation, long‐term potentiation/depression of synaptic weights, and spike‐time‐dependent plasticity. These results constitute an important step toward the development of neuromorphic computing devices leveraging the tunable electronic properties of correlated oxides, and pave the way toward enhancing future device functionalities by exploiting the magnetic (spin) degree of freedom of the half metallic transistor channel.

Synaptic transistors with low-temperature, solution-processed dielectric films have demonstrated programmable conductance, and therefore potential applications in hardware artificial neural networks for recognizing noisy images. Here, we engineered AlOx/InOx synaptic transistors via a solution process to instantiate neural networks. The transistors show long-term potentiation under appropriate gate voltage pulses. The artificial neural network, consisting of one input layer and one output layer, was constructed using 9 × 3 synaptic transistors. By programming the calculated weight, the hardware network can recognize 3 × 3 pixel images of characters z, v and n with a high accuracy of 85%, even with 40% noise. This work demonstrates that metal-oxide transistors, which exhibit significant long-term potentiation of conductance, can be used for the accurate recognition of noisy images.

With the arrival of the era of artificial intelligence (AI) and big data, the explosive growth of data has raised higher demands on computer hardware and systems. Neuromorphic techniques inspired by biological nervous systems are expected to be one of the approaches to breaking the von Neumann bottleneck. Piezotronic neuromorphic devices modulate electrical transport characteristics by piezopotential and directly associate external mechanical motion with electrical output signals in an active manner, with the capability to sense/store/process information of external stimuli. In this review, we have presented the piezotronic neuromorphic devices (which are classified into strain-gated piezotronic transistors and piezoelectric nanogenerator-gated field effect transistors based on device structure) and discussed their operating mechanisms and related manufacture techniques. Secondly, we summarized the research progress of piezotronic neuromorphic devices in recent years and provided a detailed discussion on multifunctional applications, including bionic sensing, information storage, logic computing, and electrical/optical artificial synapses. Finally, in the context of future development, challenges, and perspectives, we have discussed how to modulate novel neuromorphic devices with piezotronic effects more effectively. It is believed that the piezotronic neuromorphic devices have great potential for the next generation of interactive sensation/memory/computation to facilitate the development of the Internet of Things, AI, biomedical engineering, etc.

Abstract Brain‐inspired neuromorphic computing has drawn significant attraction as a promising technology beyond von Neumann architecture by using the parallel structure of synapses and neurons. Various artificial synapse configurations and materials have been proposed to emulate synaptic behaviors for human brain functions such as memorizing, learning, and visual processing. Especially, the memory type indium‐gallium‐zinc‐oxide (IGZO) synaptic transistor adopting a charge trapping layer (CTL) has the advantages of high stability and a low leakage current of the IGZO channel. However, the CTL material should be carefully selected and optimized to overcome the low de‐trapping efficiency, resulting from difficulty in inducing holes in the IGZO channel. In this paper, IGZO is adopted as a CTL and found out that making it degenerated is crucial to improving de‐trapping efficiency. The degenerate CTL, where electrons remain as free electrons, induces Fowler‐Nordheim tunneling by increasing the electric field across the tunneling layer. As a result, the synaptic transistor represents a high linearity of potentiation (αp: −0.03) and depression (αd: −0.47) with 64 conductance levels, which enables the spiking neural network simulation to achieve high accuracy of 98.08%. These experimental results indicate that the synapse transistor can be one of the promising candidates for neuromorphic applications.

The autonomic nervous system maintains homeostasis in organisms through complex neural pathways and responds adaptively to changes in the external and internal environment. The fabrication of an artificial autonomic nervous system is reported that replicates combined effects of sympathetic and parasympathetic nerves on cardiac activity and pupillary control, to mimic the regulation of autonomic nervous system to external changes. The artificial autonomic nerve‐controlled pupil contraction and relaxation, modulating the rate of heartbeats for normal cardiac rhythm and arrhythmia as reflected by blink rates of a signal indicator. These functions are switched by using a parallel‐channeled synaptic transistor with a special n‐i‐p heterostructure that has a 2D h‐BN insulator in the middle to provide barrier against ion injection into the 2D MoS2 bottom n‐channel and enable short‐term plasticity as induced by acetylcholine, and the electrochemical doping reaction occurred at the P3HT nanowire p‐channels on top to enable relatively long‐term plasticity as induced by noradrenaline. Low‐energy consumption down to femtojoule and an ultrahigh paired‐pulse facilitation index up to ≈455% are demonstrated. An artificial neural network based on device characteristics achieves a high recognition accuracy for electrocardiogram patterns. This study extends insights into artificial nerves‐inspired biological signal processing and recognition. [ABSTRACT FROM AUTHOR]

Artificial synapses are a key component of neuromorphic computing systems. To achieve high‐performance neuromorphic computing ability, a huge number of artificial synapses should be integrated because the human brain has a huge number of synapses (≈1015). In this study, a coplanar synaptic, thin‐film transistor (TFT) made of c‐axis‐aligned crystalline indium gallium tin oxide (CAAC–IGTO) is developed. The electrical characteristics of the biological synapses such as inhibitory postsynaptic current (IPSC), paired‐pulse depression (PPD), short‐term plasticity (STP), and long‐term plasticity at VDS = 0.1 V, are demonstrated. The measured synaptic behavior can be explained by the migration of positively charged oxygen vacancies (Vo+/Vo++) in the CAAC–IGTO layer. The mechanism of implementing synaptic behavior is completely new, compared to previous reports using electrolytes or ferroelectric gate insulators. The advantage of this device is to use conventional gate insulators such as SiO2 for synaptic behavior. Previous studies use chitosan, Ta2O3, SiO2 nanoparticles , Gd2O3, and HfZrOx for gate insulators, which cannot be used for high integration of synaptic devices. The metal–oxide TFTs, widely used in the display industry, can be applied to the synaptic transistors. Therefore, CAAC–IGTO synaptic TFT can be a good candidate for application as an artificial synapse for highly integrated neuromorphic chips. [ABSTRACT FROM AUTHOR]

In this study, we fabricated an electric double-layer transistor (EDLT), a synaptic device, by preparing a casein biopolymer electrolyte solution using an efficient microwave-assisted synthesis to replace the conventional heating (heat stirrer) synthesis. Microwave irradiation (MWI) is more efficient in transferring energy to materials than heat stirrer, which significantly reduces the preparation time for casein electrolytes. The capacitance–frequency characteristics of metal–insulator–metal configurations applying the casein electrolyte prepared through MWI or a heat stirrer were measured. The capacitance of the MWI synthetic casein was 3.58 μF/cm2 at 1 Hz, which was higher than that of the heat stirrer (1.78 μF/cm2), confirming a stronger EDL gating effect. Electrolyte-gated EDLTs using two different casein electrolytes as gate-insulating films were fabricated. The MWI synthetic casein exhibited superior EDLT electrical characteristics compared to the heat stirrer. Meanwhile, essential synaptic functions, including excitatory post-synaptic current, paired-pulse facilitation, signal filtering, and potentiation/depression, were successfully demonstrated in both EDLTs. However, MWI synthetic casein electrolyte-gated EDLT showed higher synaptic facilitation than the heat stirrer. Furthermore, we performed an MNIST handwritten-digit-recognition task using a multilayer artificial neural network and MWI synthetic casein EDLT achieved a higher recognition rate of 91.24%. The results suggest that microwave-assisted casein solution synthesis is an effective method for realizing biocompatible neuromorphic systems. [ABSTRACT FROM AUTHOR]

In this study, we propose the use of artificial synaptic transistors with coplanar-gate structures fabricated on paper substrates comprising biocompatible and low-cost potato-starch electrolyte and indium–gallium–zinc oxide (IGZO) channels. The electrical double layer (EDL) gating effect of potato-starch electrolytes enabled the emulation of biological synaptic plasticity. Frequency dependence measurements of capacitance using a metal-insulator-metal capacitor configuration showed a 1.27 μF/cm2 at a frequency of 10 Hz. Therefore, strong capacitive coupling was confirmed within the potato-starch electrolyte/IGZO channel interface owing to EDL formation because of internal proton migration. An electrical characteristics evaluation of the potato-starch EDL transistors through transfer and output curve resulted in counterclockwise hysteresis caused by proton migration in the electrolyte; the hysteresis window linearly increased with maximum gate voltage. A synaptic functionality evaluation with single-spike excitatory post-synaptic current (EPSC), paired-pulse facilitation (PPF), and multi-spike EPSC resulted in mimicking short-term synaptic plasticity and signal transmission in the biological neural network. Further, channel conductance modulation by repetitive presynaptic stimuli, comprising potentiation and depression pulses, enabled stable modulation of synaptic weights, thereby validating the long-term plasticity. Finally, recognition simulations on the Modified National Institute of Standards and Technology (MNIST) handwritten digit database yielded a 92% recognition rate, thereby demonstrating the applicability of the proposed synaptic device to the neuromorphic system. [ABSTRACT FROM AUTHOR]

Artificial synapses based on electrochemical synaptic transistors (SynTs) have attracted tremendous attention toward massive parallel computing operations. However, most SynTs still suffer from downscaling limitations and high energy consumption. To overcome such drawbacks, a complementary metal–oxide–semiconductor (CMOS) back‐end‐of‐line compatible solid‐state SynT is presented, which includes an ultrathin (10 nm thick) quasiamorphous LixTiO2 channel. A nonvolatile conductance modulation (<75 nS) is achieved through reversible lithium intercalation into the channel, and synaptic functions, such as long‐term potentiation/depression involve ultralow switching energy of 2 fJ µm−2. Moreover, this SynT shows excellent endurance (>105 weight updates) and recognition accuracy (>95% on the MNIST data test using crossbar simulations). Furthermore, a comprehensive electrochemical study allows deeper insight into the specific pseudocapacitive mechanism at the origin of conductance modulation. These results underline the high potential of LixTiO2‐based SynTs for energy‐efficient neuromorphic applications. [ABSTRACT FROM AUTHOR]

Nociceptors are kinds of sensory neurons that send warning information to the central nervous system in response to noxious stimuli. Thermal nociception happens as the thermal stimulus exceeds 45 °C as this temperature is perceived to be potentially harmful. Simulating this function is of great significance to developing bioinspired electronic skins and humanoid robots, which thus creates more demands for electronic devices that can simulate thermal nociception. Herein, an artificial thermal nociceptor (ATN) is fabricated by integrating a temperature sensor and a synaptic transistor, which can simulate the thermal pain threshold of the human body and operates in a very similar way as the transient receptor potential vanilloid 1 (TRPV1). For this ATN, the function of temperature sensing is realized by a graphite–polydimethylsiloxane (Gr–PDMS) composite temperature sensor, and the synaptic functions, as well as nociceptor features, are emulated through a synaptic transistor using xanthan gum polysaccharide electrolyte as gate dielectric, providing energy‐efficient building blocks for brain‐inspired computation systems. In a word, the ATN proposed can help to open a new avenue and provides more possibilities in the design of artificial sensory systems with the functions of temperature perception and thermal feedback. [ABSTRACT FROM AUTHOR]

Three‐terminal synaptic transistor has drawn significant research interests for neuromorphic computation due to its advantage of facile device integrability. Lately, bulk‐heterojunction‐based synaptic transistors with bipolar modulation are proposed to exempt the use of an additional floating gate. However, the actual correlation between the channel's ambipolarity, memory characteristic, and synaptic behavior for a floating‐gate free transistor has not been investigated yet. Herein, by studying five diketopyrrolopyrrole–benzotriazole dual‐acceptor random conjugated polymers, a clear correlation among the hole/electron ratio, the memory retention characteristic, and the synaptic behavior for the polymer channel layer in a floating‐gate free transistor is described. It reveals that the polymers with balanced ambipolarity possess better charge trapping capabilities and larger memory windows; however, the high ambipolarity results in higher volatility of the memory characteristics, namely poor memory retention capability. In contrast, the polymer with a reduced ambipolarity possesses an enhanced memory retention capability despite showing a reduced memory window. It is further manifested that this enhanced charge retention capability enables the device to present artificial synaptic characteristics. The results highlight the importance of the channel's ambipolarity of floating‐gate free transistors on the resultant volatile memory characteristics and synaptic behaviors. [ABSTRACT FROM AUTHOR]

[Display omitted] The performance of conventional computer based on von Neumann architecture is limited due to the physical separation of memory and processor. By synergistically integrating various sensors with synaptic devices, recently emerging interactive neuromorphic devices can directly sense/store/process various stimuli information from external environments and implement functions of perception, learning, memory, and computation. In this review, we present the basic model of bioinspired interactive neuromorphic devices and discuss the performance metrics. Next, we summarize the recent progress and development of bioinspired interactive neuromorphic devices, which are classified into neuromorphic tactile systems, visual systems, auditory systems, and multisensory system. They are discussed in detail from the aspects of materials, device architectures, operating mechanisms, synaptic plasticity, and potential applications. Additionally, the bioinspired interactive neuromorphic devices that can fuse multiple/mixed sensing signals are proposed to address more realistic and sophisticated problems. Finally, we discuss the pros and cons regarding to the computing neurons and integrating sensory neurons and deliver the perspectives on interactive neuromorphic devices at the material, device, network, and system levels. It is believed the neuromorphic devices can provide promising solutions to next generation of interactive sensation/memory/computation toward the development of multimodal, low-power, and large-scale intelligent systems endowed with neuromorphic features. [ABSTRACT FROM AUTHOR]

Electrolyte‐gated transistors have been proposed as promising candidates for neuromorphic applications. Synaptic plasticity behaviors and most recently synaptic metaplasticity or plasticity of plasticity behaviors have been mimicked on electrolyte‐gated transistors. In this work, indium‐gallium‐zinc‐oxide thin‐film transistors gated with sputtered SiO2 electrolytes are fabricated. Both spiking‐width‐dependent and spiking‐height‐dependent metaplasticity behaviors are successfully mimicked. The effects are modulated by the drain voltage bias. A physical model based on the electric‐double‐layer coupling, the RC circuit theory, and the stretched‐exponential diffusion is proposed for the metaplasticity behaviors. The experiment data have been well fitted by the proposed model. Meanwhile, the Bienenstock, Cooper, and Munro learning rule, which describes the threshold‐tunable, spiking‐rate‐dependent plasticity behaviors, is also successfully emulated, providing insight into the synaptic metaplasticity behaviors in electrolyte‐gated synaptic transistors. [ABSTRACT FROM AUTHOR]

Nociceptors are kinds of sensory neurons that send warning information to the central nervous system in response to noxious stimuli. Thermal nociception happens as the thermal stimulus exceeds 45 °C as this temperature is perceived to be potentially harmful. Simulating this function is of great significance to developing bioinspired electronic skins and humanoid robots, which thus creates more demands for electronic devices that can simulate thermal nociception. Herein, an artificial thermal nociceptor (ATN) is fabricated by integrating a temperature sensor and a synaptic transistor, which can simulate the thermal pain threshold of the human body and operates in a very similar way as the transient receptor potential vanilloid 1 (TRPV1). For this ATN, the function of temperature sensing is realized by a graphite–polydimethylsiloxane (Gr–PDMS) composite temperature sensor, and the synaptic functions, as well as nociceptor features, are emulated through a synaptic transistor using xanthan gum polysaccharide electrolyte as gate dielectric, providing energy‐efficient building blocks for brain‐inspired computation systems. In a word, the ATN proposed can help to open a new avenue and provides more possibilities in the design of artificial sensory systems with the functions of temperature perception and thermal feedback.

Abstract Three‐terminal synaptic transistor has drawn significant research interests for neuromorphic computation due to its advantage of facile device integrability. Lately, bulk‐heterojunction‐based synaptic transistors with bipolar modulation are proposed to exempt the use of an additional floating gate. However, the actual correlation between the channel's ambipolarity, memory characteristic, and synaptic behavior for a floating‐gate free transistor has not been investigated yet. Herein, by studying five diketopyrrolopyrrole–benzotriazole dual‐acceptor random conjugated polymers, a clear correlation among the hole/electron ratio, the memory retention characteristic, and the synaptic behavior for the polymer channel layer in a floating‐gate free transistor is described. It reveals that the polymers with balanced ambipolarity possess better charge trapping capabilities and larger memory windows; however, the high ambipolarity results in higher volatility of the memory characteristics, namely poor memory retention capability. In contrast, the polymer with a reduced ambipolarity possesses an enhanced memory retention capability despite showing a reduced memory window. It is further manifested that this enhanced charge retention capability enables the device to present artificial synaptic characteristics. The results highlight the importance of the channel's ambipolarity of floating‐gate free transistors on the resultant volatile memory characteristics and synaptic behaviors.

Synaptic transistors have shown great potential in neuromorphic computing, but remain challenging to simulate linear weight updates through conductance switching under low voltage spiking operation. Here, a low voltage and near‐linear weight update synaptic transistor are proposed by developing an interfacial‐defect dominated floating gate structure, in which inter‐diffused defects are surrounded by near‐defect free and ultrathin (1 nm) dielectrics in HfO2/Al2O3 periodic high‐k laminates. In the laminates, inter‐diffused defects are surrounded by near‐defect free and ultrathin (1 nm) HfO2 and Al2O3 tunneling layers deposited by atom layer deposition, which contributes to the accurate regulation of multi‐level charge trapping confined at independent interfacial regions, and trades off the low operation voltages and the nonvolatile characteristics of the devices. A very small conductance switching nonlinearity (NL = 0.05) and an excellent image recognition accuracy (93.1%) are demonstrated under low voltages (−3 V/1.8 V) in an optimized device with (1 nm HfO2/1 nm Al2O3)3 laminates. Besides, the basic synaptic functions are successfully mimicked based on the long‐term plasticity. These results have referential significance for the future artificial synapse with low energy consumption and high efficiency. [ABSTRACT FROM AUTHOR]

Chargeable polymer electret‐based organic field‐effect transistor (OFET) memory devices are attractive for intrinsically flexible artificial synapse. However, the effects of molecular weight (Mw) of polymer electret on the charge trapping properties, especially the implementation of synaptic functions, are not yet well‐understood. In this work, the authors study pentacene‐based synaptic OFET memory made from two different molecular weight polymer electrets, with poly(N‐vinylcarbazole) (PVK) as the case study. Utilizing the synergistic effect of smooth surface morphology, higher polymer chain‐end density and lower dielectric constant, OFET memory device with lower Mw PVK electret showed a larger memory window (28.2 V) and faster write speed (1 ms) compared to that with higher Mw PVK. Benefiting from its charge‐trapping ability, the synaptic OFETs with lower Mw PVK delivered a better modulation of synaptic weight. The co‐modulation of photonic and electric operations enabled the reconfigurable short‐term plasticity and long‐term plasticity (LTP) in lower Mw PVK devices, further leading to the STP‐based emulation of visible color recognition and LTP‐based neural network simulation. This work enlightens a detailed understanding of the molecular weight‐dependent charge trapping behavior for the future integration of visible information sensing‐memory‐processing in optoelectronic OFET memory. [ABSTRACT FROM AUTHOR]

Organic electrochemical transistors formed by in operando electropolymerization of the semiconducting channel are increasingly becoming recognized as a simple and effective implementation of synapses in neuromorphic hardware. However, very few studies have reported the requirements that must be met to ensure that the polymer spreads along the substrate to form a functional conducting channel. The nature of the interface between the substrate and various monomer precursors of conducting polymers through molecular dynamics simulations is investigated, showing that monomer adsorption to the substrate produces an increase in the effective monomer concentration at the surface. By evaluating combinatorial couples of monomers baring various sidechains with differently functionalized substrates, it is shown that the interactions between the substrate and the monomer precursor control the lateral growth of a polymer film along an inert substrate. This effect has implications for fabricating synaptic systems on inexpensive, flexible substrates. [ABSTRACT FROM AUTHOR]

Metal oxide semiconductors thin film transistors (TFTs) have become important candidates for neuromorphic computing applications by simulating the functions of biological synapses. In this article, optoelectronic synaptic transistors with tunable plasticity are achieved by utilizing printed indium tin oxide (ITO) channel and Ag/ITO dual-layer contact electrodes. The Ag/ITO dual-layer electrodes not only provide ITO TFTs with high electrical performance but enabled them with tunable plasticity. Under the synergistic electrical and optical modulation, both the short- and long-term plasticity in the printed ITO synaptic TFTs are emulated. These achievements are of great significance for applying printed synaptic transistors in optoelectronic neuromorphic hardware. [ABSTRACT FROM AUTHOR]

Artificial synaptic devices are the basic composition units for neuromorphic computing processors that realize massive parallel computing. However, the n‐type organic transistors have failed to achieve good performance as an artificial synaptic device for neuromorphic computing until now. Here, a vertical three‐terminal n‐type organic artificial synapse (TNOAS) using a lithium ion‐based organic dielectric and the n‐type donor–acceptor (D–A) conjugated polymer‐naphthalene‐1,4,5,8‐tetracarboxylic‐diimide‐thiophene‐vinyl‐thiophene (NDI‐gTVT) as the channel is proposed. The TNOAS achieves nonvolatile conductance modulation with high current density operation (≈10 KA cm−2) at low voltage and mimics the basic functions of biological synapses, such as long‐term synaptic plasticity and paired‐pulse facilitation. The minimum energy consumption of a response event triggered by a single action potential is 6.16 pJ, which can be comparable with p‐type counterparts. Moreover, simulation using handwritten digital datasets exhibit a high recognition accuracy of 94%. [ABSTRACT FROM AUTHOR]

Multifarious artificial synaptic devices are extensively proposed in the field of neuromorphic hardware systems for their applicability in promising parallel computer architecture, which is preferred to classical Von Neumann architecture in numerous and complex information processing. Besides the ability to mimic typical biological synaptic behaviors, low power consumption is critical for the synaptic devices in the neuromorphic hardware system.In this paper, ultralow‐power Ta2O5/Al2O3 bilayer‐gate‐dielectric synaptic transistors (TABSTs) with low‐temperature atomic layer deposited dielectric are proposed. The TABSTs show power consumption as low as 19.9 aJ per synaptic event successfully at a low drain voltage of 0.001 V and a short pulse width of 1 ms. Essential synaptic behaviors including excitatory postsynaptic current, inhibitory postsynaptic current, spike‐amplitude‐dependent plasticity, spike‐duration‐dependent plasticity, paired pulse facilitation, long‐term potentiation, long‐term depression, the transition from short‐term memory to long‐term memory as well as learning and forgetting abilities are well mimicked by the TABSTs. Moreover, algebraic arithmetic operations such as addition, subtraction, multiplication, and division are also implemented by the TABSTs. This work provides a promising approach to emerging neuromorphic systems. [ABSTRACT FROM AUTHOR]

Recent research interest in organic field‐effect transistor (FET) memory has shifted to the functionality of photoprogramming in terms of its potential uses in multibit data storage and light‐assisted encryption and its low‐energy consumption and broad response to various optical bands. Phototransistor memory can be modulated through both electrical stress and light illumination, allowing it to function as an orthogonal operation method without mutual interference. Herein, the basic design concepts, requirements, and architectures of phototransistor memory are introduced. Design architectures such as channel‐only, channel‐with‐photogate, photochromatic channel devices and floating gate, photoactive polymer, and organic molecule‐based electrets are systematically categorized. The operational mechanism and impact of effective combinations of channels and electrets are reviewed to provide a fundamental understanding of photoprogramming as well as its potential future developmental applications as nonvolatile memory. Furthermore, recent advances in phototransistors and their diverse applications, including nonvolatile memory, artificial synapses, and photodetectors, are summarized. Finally, the outlook for the future development of phototransistors is briefly discussed. A comprehensive picture of the recent progress in phototransistors is provided. [ABSTRACT FROM AUTHOR]

Recent research interest in organic field‐effect transistor (FET) memory has shifted to the functionality of photoprogramming in terms of its potential uses in multibit data storage and light‐assisted encryption and its low‐energy consumption and broad response to various optical bands. Phototransistor memory can be modulated through both electrical stress and light illumination, allowing it to function as an orthogonal operation method without mutual interference. Herein, the basic design concepts, requirements, and architectures of phototransistor memory are introduced. Design architectures such as channel‐only, channel‐with‐photogate, photochromatic channel devices and floating gate, photoactive polymer, and organic molecule‐based electrets are systematically categorized. The operational mechanism and impact of effective combinations of channels and electrets are reviewed to provide a fundamental understanding of photoprogramming as well as its potential future developmental applications as nonvolatile memory. Furthermore, recent advances in phototransistors and their diverse applications, including nonvolatile memory, artificial synapses, and photodetectors, are summarized. Finally, the outlook for the future development of phototransistors is briefly discussed. A comprehensive picture of the recent progress in phototransistors is provided.

The optoelectronic synaptic transistors with various functions, broad spectral perception, and low power consumption are an urgent need for the development of advanced optical neural network systems. However, it remains a great challenge to realize the functional diversification of the systems on a single device. 2D van der Waals (vdW) materials can combine unique properties by stacking with each other to form heterojunctions, which may provide a strategy for solving this problem. Herein, an all-2D vdW heterojunction-based programmable optoelectronic synaptic transistor based on MoS 2 /Ta 2 NiS 5 heterojunctions is demonstrated. The device implements reconfigurable, multilevel non-volatile memory (NVM) states through sequential modulation of multiple optical and electrical stimuli to achieve broadband (532-808 nm), energy-efficient (17.2 fJ), hetero-synaptic functionality in a bionic manner. The intrinsic working mechanisms of the photogating effect caused by band alignment and the interfacial trapping defect modulation induced by gate voltage are revealed by Kelvin-probe force microscopy (KPFM) measurements and carrier transport analysis. Overall, the (opto)electronic synaptic weight controllability for combined in-sensor and in-memory logic processors is realized by the heterojunction properties. The proposed findings facilitate the technical realization of generic all 2D hetero-synapses for future artificial vision systems, opto-logical systems, and Internet of Things (IoT) entities., (© 2024 Wiley‐VCH GmbH.)

The highly parallel artificial neural systems based on transistor‐like devices have recently attracted widespread attention due to their high‐efficiency computing potential and the ability to mimic biological neurobehavior. For the past decades, plenty of breakthroughs related to synaptic transistors have been investigated and reported. In this work, a kind of photoelectronic transistor that successfully mimics the behaviors of biological synapses has been proposed and systematically analyzed. For the individual device, MXenes and the self‐assembled titanium dioxide on the nanosheet surface serve as floating gate and tunneling layers, respectively. As the unit electronics of the neural network, the typical synaptic behaviors and the reliable memory stability of the synaptic transistors have been demonstrated through the voltage test. Furthermore, for the first time, the UV‐responsive synaptic properties of the MXenes floating gated transistor and its applications, including conditional reflex and supervised learning, have been measured and realized. These photoelectric synapse characteristics illustrate the great potential of the device in bio‐imitation vision applications. Finally, through the simulation based on an artificial neural network algorithm, the device successfully realizes the recognition application of handwritten digital images. Thus, this article provides a highly feasible solution for applying artificial synaptic devices to hardware neuromorphic networks. [ABSTRACT FROM AUTHOR]

Ultrathin 2D semiconductor materials have attracted tremendous attention due to their potential application in neuromorphic computing, especially for electronic devices with high stability and low energy consumption. Two‐terminal memristors cannot extend the range of functionalities for complex neuromorphic applications due to their inherent single presynaptic input; thus three‐terminal synaptic transistors based on monolayer monocrystalline‐MoS2 films grown by chemical vapor deposition (CVD) are fabricated in this work. Importantly, there are two modes including drain and gate dual tunability available in nonvolatile memory functions. Both drain terminal and gate terminal can be used as presynaptic inputs to successfully simulate excitatory/inhibitory postsynaptic current (EPSC/IPSC), spike‐amplitude‐dependent plasticity (SADP), spike‐timing‐dependent plasticity (STDP), and long‐term plasticity (LTP) of biological synapses, providing multiple degrees of freedom for synaptic weight modulation. The conductance modulation of drain and gate terminals can be attributed to the migration and charges trapping/detrapping process of sulfur vacancies. Using monocrystalline‐MoS2 films, the device not only attains a lower operation voltage and a higher endurance (5000 cycles), but exhibit low energy consumption during the LTP process (≈3.75 pJ) with the gate terminal, indicating more flexibility and great potential of complex neuromorphic application. [ABSTRACT FROM AUTHOR]

This paper presents the first synaptic transistor (ST) that combines crossed p‐type and n‐type semiconductor nanowires (NWs) to form a bipolar conductive channels. The bipolar channel with both electron and hole transport paths enables the emulation of multiplexed neurotransmission of different neurotransmitters in a brain to realize complex neural functions using nanowires. Except for basic synaptic functions, the device demonstrates the potential to distinguish reward‐processing and aversive responses. The opposite polarities of NWs enable emulation of a series of complex neural activities using a single electronic device, such as satiety, depression, and drug withdrawal. The device is applicable to deep convolutional neural networks for electrocardiograms. The new strategy of versatile use of electro‐hydrodynamically printed NWs (e‐NWs) is expected to facilitate emulation of complex neural behaviors, and the realization of future neuromorphic electronics that are capable of these behaviors. [ABSTRACT FROM AUTHOR]

Brain‐inspired associative memory is meaningful for pattern recognitions and image/speech processing. Here, a ferroelectric synaptic transistor network is proposed that is capable of associative learning and one‐step recalling of a whole set of data from only partial information. The competition between an external field and the internal depolarization field governs the ferroelectric creep of domain walls and offers each single ferroelectric synapse a full and subfemtojoule‐energy‐cost Hebbian synaptic plasticity, including short‐term memory (STM) to long‐term memory (LTM) transition, and remarkably both spike‐timing‐dependent plasticity (STDP) and spike‐rate‐dependent plasticity (SRDP). Assisted by the third terminal to control the ferroelectric domain dynamics, self‐adaptive coupling between neurons is realized by updating synaptic weight concurrently. Pavlov's dog experiment and multiassociative memories are demonstrated in this ferroelectric synaptic transistor network. Such ferroelectric synaptic transistor network is available for building multilayer neural networks and provides new avenues for associative‐memory information processing. [ABSTRACT FROM AUTHOR]

Reversible phase transformation of correlated oxides by field‐driven ionic process present opportunity to efficiently transduce between ionic transfer and electrical currents in insertion‐based reconfigurable transistors. However, the switching rate of insertion transistors is fundamentally limited by the slow rate of ionic insertion into the lattices of correlated oxides. Here, it is demonstrated that preformed oxygen vacancies in VO2−δ lattices strongly accelerate proton insertion by low gate voltage in synaptic transistors. As the degree of oxygen deficiency δ increases in VO2−δ transistors, the steepness of phase transformation and transconductance increase during the voltage sweep at the expense of the channel current modulation. Theoretical and experimental analyses reveal that the accelerated of H+ kinetics in the VO2−δ lattice occurs because immobile oxygen vacancies reduce the energy barrier to H+ migration. In an electronic synapse, this facile H+ migration in VO2−δ lattices renders "inscribed" memory by positioning the H+ neurotransmitter far from the electrolyte/VO2−δ interface. This discovery suggests a strategy to improve the learning and memory processes of artificial synaptic devices by controlling the density of intrinsic defects in the lattice framework to achieve efficient ion exchange. [ABSTRACT FROM AUTHOR]

Abstract Recent years have witnessed the emergence of visible‐light‐stimulated synaptic transistors, which has potential for the construction of visual cognition and light‐controlled neuromorphic hardware. Efforts are made to improve the visible light‐stimulated plasticity by boosting the synaptic weight after optical neural activities. However, such modulation at the expense of increased initial synaptic weight before the stimuli still results in the limited plasticity. Here, instead of employing those inherent interfacial trap‐induced effects that raise the activated synaptic weight, it is demonstrated that an interfacial modification to inhibit them can greatly reduce the initial synaptic weight. Hence, with the assistance of the charge‐trapping memory effect, the initial and the activated synaptic weight can be modulated, leading to a significantly enhanced plasticity. Such enhancement is accomplished in a type of pentacene‐based synaptic transistors in which a visible‐light‐triggered plasticity above 108% (at 0 V gate voltage and −1 V source–drain voltage) can be achieved under a moderate optoelectronic stimulus. As a demonstration, long‐term potentiation is implemented to showcase synaptic responses with high plasticity after repeated light‐triggered neural activities, suggesting the proposed mechanism and design paradigm would be beneficial for future optical neuromorphic architectures.