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Wearable sensors are effective point-of-care (POC) diagnostic tools for the timely analysis of a patient's disease status. The best way to achieve such biosensors is by developing a device for the noninvasive investigation of human sweat. However, the ultralow concentrations of biomarkers in sweat pose challenges to achieving high sensitivity. The remarkable qualities of flexible paper field effect transistors (PFETs), including their high modulation index, pliability, transducing capability, and quick reaction, make them potential candidates for wearable sensors. Our study presents a biodegradable, disposable, scalable, low-cost PFET device for nonenzymatic, wearable glucose sensing applications. In the sequence, we further discussed the functionalization of the channel, electrodes, and sensing methods. Here, the semiconducting silver (Ag) nanoparticle (NP)-decorated cuprous oxide (Cu2O) dispersed on reduced graphene oxide (rGO) was synthesized by a rapid, cheaper microwave-assisted method. Material characterization techniques validate the nanocomposite (NC) formation, which is patterned as the transistor channel. Charge (cation/anion) generated due to the electrolytes (analyte) and NC interaction develops interface potential and electric double layer (EDL)/capacitance change that stimulates the channel conductivity. The faster electron and hole mobility, coupled with the superior selectivity of Ag–Cu2O and the high conductivity of rGO, collectively contribute to excellent electrocatalytic activity for glucose oxidation. The fabricated PFET sensor could achieve a limit of detection (LOD) of 96 nM with high sensitivity and self-amplification effect. Real-time applications using artificial sweat introduced with a physiological range of sweat glucose concentrations (0.01–0.1 mM) yielded promising findings, indicating the potential use of inexpensive and sustainable PFETs for wearable glucose sensors. [ABSTRACT FROM AUTHOR]

Abstract Electronics on paper enable some specific applications out of conventional ones which require innovative approaches and concepts on the design of devices and systems. Within this context, this work demonstrates that a unique set of characteristics can be combined in planar dual‐gate oxide–based field effect transistors with a back floating electrode using paper simultaneously as substrate and dielectric. The working principle of these transistors relies on the formation of electric double layers at the semiconductor/paper and paper/back floating electrode interfaces (associated to ions displacement within the paper) that can be disturbed by a voltage applied at a secondary gate, by the back floating potential or by the combination of both. This feature allows for the control of the on‐voltage of the transistors, from depletion to enhancement mode, for instance. Moreover, this specific characteristic allows the implementation of universal logic gates (NAND and NOR) using only one transistor, by setting the proper combination of the voltage level applied at each gate. This way a simple and universal device architecture can be envisaged towards the simplification of the production of low power electronic systems on paper.

Electronics on paper enable some specific applications out of conventional ones which require innovative approaches and concepts on the design of devices and systems. Within this context, this work demonstrates that a unique set of characteristics can be combined in planar dual-gate oxide-based field effect transistors with a back floating electrode using paper simultaneously as substrate and dielectric. The working principle of these transistors relies on the formation of electric double layers at the semiconductor/paper and paper/back floating electrode interfaces (associated to ions displacement within the paper) that can be disturbed by a voltage applied at a secondary gate, by the back floating potential or by the combination of both. This feature allows for the control of the on-voltage of the transistors, from depletion to enhancement mode, for instance. Moreover, this specific characteristic allows the implementation of universal logic gates (NAND and NOR) using only one transistor, by setting the proper combination of the voltage level applied at each gate. This way a simple and universal device architecture can be envisaged towards the simplification of the production of low power electronic systems on paper. [ABSTRACT FROM AUTHOR]

Fully printed and flexible inorganic electrolyte gated transistors (EGTs) on paper with a channel layer based on an interconnected zinc oxide (ZnO) nanoparticle matrix are reported in this work. The required rheological properties and good layer formation after printing are obtained using an eco-friendly binder such as ethyl cellulose (EC) to disperse the ZnO nanoparticles. Fully printed devices on glass substrates using a composite solid polymer electrolyte as gate dielectric exhibit saturation mobility above 5 cm2 V−1 s−1 after annealing at 350 °C. Proper optimization of the nanoparticle content in the ink allows for the formation of a ZnO channel layer at a maximum annealing temperature of 150 °C, compatible with paper substrates. These devices show low operation voltages, with a subthreshold slope of 0.21 V dec−1, a turn on voltage of 1.90 V, a saturation mobility of 0.07 cm2 V−1 s−1 and an Ion/Ioff ratio of more than three orders of magnitude.

The present work reports on the handwriting of electronic circuits on paper based on the deposition of an inorganic oxide semiconductor, exploiting the pen‐on‐paper (PoP) approach. The method relies on the use of a parallel metal plate pen, well known from calligraphy applications, which permits controlled deposition of a continuous zinc oxide (ZnO) dual‐phase layer on conventional printing paper. The hand‐drawn ZnO film exhibits a continuous and uniform surface with a thickness of roughly 1.5 µm, allowing the application as active layer for UV sensors and field effect transistors on paper. Photocurrent generated from the UV radiation reaches values up to 3.4 mA cm−2 with switching times on the order of few seconds. The final written paper transistors, where paper plays simultaneously the role of substrate and dielectric, reaches On/Off current ratios (IOn/IOff) of about two orders of magnitude and field effect mobility close to 5 × 10−3 cm2 V−1 s−1. As a final proof‐of‐concept a common source amplifier showing clear inverting characteristics is fabricated using a PoP written driving ZnO‐based transistor and a pencil‐drawn track as the load resistance. [ABSTRACT FROM AUTHOR]

When thinking on low cost and sustainable electronic systems, paper can be considered as an interesting option to be used as substrate but also as a component of such systems. In this work we have tailored paper samples that were used simultaneously as physical support and dielectric in oxide based paper field effect transistors (FETs). It was observed that the gate leakage current in these devices depends directly from fibril's dimension and arrangement, being lower for micro/nano fibrillated cellulose paper. Moreover, extra ionic charge added to the paper during its production results in the improvement of FETs' electrical properties, with saturation mobility of 16 cm 2V -1s -1 and on/off current ratio close to 105. (© 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

Abstract: A commercial sheet of paper based on natural cellulose fibers acting as permeable membrane with thin film metal cathode (Cu) and anode (Al) layers in each face was used to produce paper batteries that could be interconnected in series and rechargeable using water as electrolyte. Their electrical characteristics and the set of electrochemical reactions that support the experimental behavior observed are described in this paper. A series of integrated batteries able to supply a voltage of about 3V and a current ranging from 0.7μA to 25μA in cells with sizes of 1.2cm×3.0cm for a relative humidity in the range of 50–65% were produced in a single sheet of paper, and successfully applied to control the ON/OFF gate state of paper transistors. [Copyright &y& Elsevier]

Fully printed and flexible inorganic electrolyte gated transistors (EGTs) on paper with a channel layer based on an interconnected zinc oxide (ZnO) nanoparticle matrix are reported in this work. The required rheological properties and good layer formation after printing are obtained using an eco-friendly binder such as ethyl cellulose (EC) to disperse the ZnO nanoparticles. Fully printed devices on glass substrates using a composite solid polymer electrolyte as gate dielectric exhibit saturation mobility above 5 cm2 V−1 s−1 after annealing at 350 °C. Proper optimization of the nanoparticle content in the ink allows for the formation of a ZnO channel layer at a maximum annealing temperature of 150 °C, compatible with paper substrates. These devices show low operation voltages, with a subthreshold slope of 0.21 V dec−1, a turn on voltage of 1.90 V, a saturation mobility of 0.07 cm2 V−1 s−1 and an Ion/Ioff ratio of more than three orders of magnitude. [ABSTRACT FROM AUTHOR]

Proper control of the voltage applied at both gates of a planar dual‐gate field effect transistor (FET) using a cellulose matrix as the dielectric makes it possible to operate them either in depletion or enhancement mode. In article number 1800423, Luís Pereira, Elvira Fortunato, Rodrigo Martins, and co‐workers demonstrate the implementation of universal logic gates (NAND and NOR) using only one transistor, by setting the appropriate combination of the voltage level applied at each gate. [ABSTRACT FROM AUTHOR]