Search

To ensure the three-level neutral point clamped (NPC) grid-connected inverter in a grid-connected system continuous operation after a single-phase bridge arm short circuit or open circuit failure, an optimal compensation fault-tolerant control strategy with low common-mode voltage is proposed in this paper, which is based on space vector pulse width modulation (SVPWM). Firstly, the reference voltage vector synthesis rule is determined by analyzing the common mode voltage corresponding to the switch state of the eight-switch three-phase inverters (ESTPI), which is the topology of the three-level NPC inverter with one phase failure. Then, the mechanism of neutral point potential fluctuation is analyzed by the neutral point current change in a fundamental wave period. Further, the space vector synthesis is compensated based on this mechanism. Finally, the low-pass filter and hysteresis controller are designed to optimize vector synthesis compensation, so as to ensure the quality of grid-connected current and effectively restrain the neutral point potential offset of the DC bus. The simulation results show that the proposed fault-tolerant control strategy can realize the stable and reliable operation of the grid-connected system after single-phase bridge arm failure, and the common-mode voltage can be reduced for one-third of the period time. The quality of grid-connected current is improved significantly. The proposed controller has good control characteristics when the grid-connected current changes.

Copyright of Electric Power Engineering Technology is the property of Editorial Department of Electric Power Engineering Technology and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

This research describes open circuit detection and fault location for active 3-level NPC (neutral point clamped) inverter switches during normal and connected to the neutral point. This work introduces the current path tracking method to correlate the operating mode of NPC inverter and switch status in abnormal and normal conditions. Furthermore, a hierarchal diagnosis approach is introduced for open circuit faults using output Voltage Vector Residual Evaluation (VVRE). The node potential and conduction path can be derived from the model to indicate the NPC inverter circuit faults. Two steps are involved in the diagnosis. First, OC fault can be determined by analyzing the difference between the reference voltage and actual voltage vector resulting from the specified current path utilization ratio. Therefore, using a current path state reconstruction method, we can distinguish faulty transistors with similar properties. The simulated results demonstrate the robustness and efficiency of the proposed approach.

In a weak grid, the line impedance variation will cause the resonant frequency of the LCL filter to shift towards lower frequencies, thus reducing the quality of the grid-connected current and affecting the power grid stability. To solve this problem, a hybrid active damping strategy with feedforward compensation is proposed for the neutral point clamped (NPC) LCL grid-connected inverter system. In order to reshape the output conductance of the grid-connected system, suppress the resonance spikes of the LCL filter and improve the adaptability of the grid-connected system to the weak grid. A first-order low-pass filter is designed in the grid-connected current loop, and an active damping control of grid-connected current based on a first-order high-pass filter is also proposed. Compared with the conventional capacitive current active damping, no additional sensors are required, and the use of a differential is avoided, which reduces the high-frequency noise. The use of passive resistors is reduced, which reduces the power loss of the grid-connected system. In addition, a point of common coupling (PCC) voltage feedforward strategy based on a low-pass filter is designed to suppress the background higher harmonics at PCC and improve the quality of grid-connected current. In this work, the robustness of the system is analyzed when the parameters of the LCL filter change. Finally, the virtual space vector modulation strategy is used to balance the neutral voltage of the DC bus. Simulation and experimental results show that the control strategy can effectively improve the adaptability of the system to the weak power grid, improve the quality of grid-connected current, and demonstrate strong stability. The THD can be decreased by 0.2% at least, and the improvements are more significant with larger line impedance; the THD is only 2.33% even at 10 mH line impedance. [ABSTRACT FROM AUTHOR]

The neutral point clamped (NPC) three-level dual-active bridge (DAB) converter can be applied at higher voltage levels and in a wider operating range than the traditional DAB converter, and therefore it is more promising in future applications. However, the NPC DAB converter suffers from unbalanced capacitor voltage, which affects the operating characteristics. This paper analyzes the power transmission characteristics of the NPC DAB converter in the three-degree-of-freedom (3-DOF) control strategy, based on which power transmission can be effectively controlled. For the capacitor voltage imbalance problem, a capacitor voltage balancing strategy based on redundant vector is proposed. Compared to the traditional capacitor voltage balancing strategy, the proposed strategy can achieve faster capacitor voltage balance without affecting the transmission power. The proposed strategy was verified by simulation that it can well maintain the capacitor voltage at a balanced state for the converter subject to changes in the output voltage reference value, i.e. the capacitor voltage balancing can be realized within 0.000 4 s under the transient condition of only 1% fluctuation.

The Virtual Synchronous Generator (VSG) emulates the characteristics of a synchronous generator to provide inertia and damping for renewable energy systems. In the case of using the NPC three-level converter structure, traditional control methods require complex dual-loop control and internal PI parameter tuning. Furthermore, although fixed-parameter VSG control can provide inertia and damping when a significant power load is switched in an islanded microgrid, it cannot guarantee frequency regulation performance. To address these issues, this paper proposes an NPC three-level VSG parameter adaptive finite control set model predictive control strategy. This method eliminates the need for dual-loop control and PI parameter tuning. By incorporating angular velocity deviation and its rate of change into adaptive adjustment, a Tracking-Differentiator (TD) is designed to calculate the rate of change of angular velocity. This approach avoids frequent fluctuation of adaptive parameters during load power switching and improves the frequency stability of the microgrid. The effectiveness of the proposed strategy is validated through simulation and experimental verification.

Capacitor voltage balancing is of importance in the neutral-point-clamped based dual-active-bridge converters. Most of traditional voltage balancing methods adopt the transformer current models in the balancing process, as the direction of the neutral-point current is affected by the transformer current polarity. However, this approach requires heavy and repetitive offline precalculation for the transformer current polarity under various operating modes, and thus, leading to complicated implementation. To overcome this, a model-free voltage balancing scheme based on a fixed-switching-state method is proposed in this letter. Two switching states are employed during the voltage balancing process in the proposed method, where the direction of the neutral-point current is independent on the transformer current polarity. Hence, the implementation can be simplified without the precalculation of transformer current polarity. Furthermore, the model-free feature of the proposed method is more robust against parameter variations or operating mode changes. Experimental tests are performed, which verify that the proposed method can achieve voltage balancing in terms of easy implementation and fast dynamics. [ABSTRACT FROM AUTHOR]

In this paper, the model predictive control technique is proposed to control the voltage balancing for the subway train 1500 V DC system for variable loads. This paper compares the conventional neutral point clamped converter (NPC) using the control technique of a PI controller with model predictive control in variable load conditions. MPC enhances the stability of the system during variable loads in comparison with the conventional technique. Consequently, the suggested control technique using MPC can maintain the DC bus output voltage dynamics at variable loads for the subway. Simulation results are provided to demonstrate the accuracy of the DC bus output voltage dynamics for the proposed control method.

In this article, a new five-level inverter is developed by inserting a switched-capacitor (SC) unit into the traditional three-level neutral-point-clamped (NPC) inverter phase leg. The SC unit consists of two capacitors and one bidirectional switch, all of which withstand a quarter of the dc input voltage. While increasing the output levels, the performance is also improved in terms of power loss, common-mode voltage, switching stress dv/dt, and output filter. Compared to other five-level inverters like the conventional NPC and active NPC five-level topologies, the new solution not only reduces the number of components and simplifies the design but also has the advantage of self-balanced capacitor voltages. The analysis, simulation, and experiment indicate that the proposed inverter is suitable for a wide range of applications like renewable source grid-connected interfaces and motor drivers. Simulation and experimental results of grid-connected operation verify that the new inverter is capable of providing both active and reactive power to the grid. Its excellent performance is also experimentally evaluated by a 1.2-kW prototype and the measured efficiency is above 97% for a wide range of load. [ABSTRACT FROM AUTHOR]

Energy generation through wind and solar is increasing with the rising interest in the renewable and clean form of energy. Due to energy crises, the world is shifting from nonrenewable energy resources to renewable energy resources. Renewable energy resources are the green and eco-friendly sources and do not affect the climate like the other fossil fuels. Renewable fuels gain popularity due to their sustainability and low carbon emission. To get energy from renewable energy sources, well-defined mechanisms and control devices must be needed. Therefore, the reliability and stability of the system are required. The inverter is one of the tools which have a significant contribution to controlling the operation of the energy conversion system. The inverter is an accessory that changes a Direct Current (DC) source into an Alternative (AC) source. By using that AC source, we can easily derive AC appliances and drive the loads. To gain more power or to derive large power motors whose power ratings are up to several kilo/Megawatts, we need multi-level inverters. One of the types of multi-level inverters is the Neutral Point Clamped inverter (NPC). NPC inverters are used where considerable power is required, such as of several megawatts. The main contribution of this research paper is to design the three levels of neutral point clamped inverters by using the Pulse width Modulation (PWM) and Space Vector Modulation (SVM) Techniques.

Impedance-source-based solar PV systems are capable of achieving both voltage boosting and inversion in a single stage, resulting in a simple design thereby enhancing reliability. One of the major concerns of PV systems is their leakage current, as it can cause hazardous operational insecurity and reliability. This article introduces a quasi-Z-source (qZS)-based five-level inverter, which displays the following advantages: 1) reactive power handling capability, 2) single-stage boosting, 3) shoot-through immunity, and 4) reduced leakage current based on VDE 0126-1-1. The proposed single-stage power converter is constituted by the fusion of a boosting stage, consisting of two back-to-back connected qZSs, with a five-level inverter produced by the combination of T-type and neutral point clamped arms. The problem of the leakage current is addressed by a modified modulation technique and a passive filter structure, which filters high-frequency variations in the common mode voltage. The working principle of the proposed power converter and the effectiveness of the modulation scheme to reduce the leakage current are assessed with the aid of simulation studies in both standalone and the grid-connected modes. The simulation results are experimentally validated with the aid of a laboratory prototype of 500 W rating. [ABSTRACT FROM AUTHOR]

In the proposed work, a modified look-up table-based direct torque control (DTC) scheme is reported for a neutral point-clamped three-level inverter-fed interior permanent magnet synchronous motor drive. In the classical DTC scheme, there are significant torque and flux ripples in the drive due to low number of available switching states. To reduce the oscillations in torque and flux, a three-level inverter-operated IPMSM drive is discussed. In a three-level inverter, the increased count of active voltage vectors is results in more sinusoidal output waveforms. Moreover, stator flux plane has 12 sectors in the proposed work unlike classical DTC. Besides, the higher level of flux and torque hysteresis comparators is implemented. DC link capacitor voltage balancing scheme is also instigated to minimize voltage stress on semiconductor devices, improve stator current THD and increased capacitor life. Based on the sector information, flux and torque hysteresis output and capacitor voltage balance logic, an improved LUT is established and explained for a three-level DTC scheme. Consequently, improved stator current (THD) and decrement in torque and flux ripples are observed. To make the system robust, model reference adaptive control (MRAC) based sensorless speed estimation algorithm is realized. The proposed DTC scheme is compared with a two-level inverter-fed and a three-level-inverter-fed DTC scheme without DC link voltage balance strategy. To carry out the analysis, MATLAB/Simulink environment is utilized. Moreover, to validate the simulation results, experimental analysis of the proposed technique is carried out using dSPACE1104. [ABSTRACT FROM AUTHOR]

Four-level neutral-point-clamped (NPC) multilevel converter topologies have been proposed and actively studied for low/medium voltage applications. As an inherent issue with these topologies, the voltage balancing of dc-link capacitors is challenging, especially when it operates as a single-end inverter/rectifier with high power factors and high modulation indexes. This article proposes a closed-loop voltage balancing algorithm that is effective and simple to implement with regular level-shifted carriers for a four-level NPC converter, e.g., a π-type converter. This approach is based on the redundant level modulation (RLM), which utilizes one additional voltage level in one switching cycle to gain extra controllability of the capacitor voltages without distorting/undermining the fundamental-frequency output voltage. An algorithm based on analytical expressions and logical operations is developed to achieve a dynamic closed-loop voltage balancing with RLM. The proposed method is effective over the full span of linear modulation indexes (M = 0 ∼ 1.15) and power factors. The proposed algorithm is validated and evaluated in both simulations and experiments. [ABSTRACT FROM AUTHOR]

In this article, the mechanism of neutral-point potential oscillations of neutral-point-clamped (NPC) three-level inverter fed dual three-phase ac motors is described. In a dual three-phase ac motor drive system, the three-level NPC inverter can be controlled as one six-phase system or two separate conventional three-phase systems. Therefore, this article extends the traditional control strategy, which injects the uniform zero-sequence voltage into the three-phase system to the six-phase system. The relationship of the uniform zero-sequence voltage and the neutral current is analyzed in detail. Meanwhile, the neutral-point potential-balancing strategy adopting dual zero-sequence voltages is presented in this article. The simulation and experiment verify that the proposed strategy adopting dual zero-sequence voltages has better control of the neutral point potential than the strategy adopting uniform zero-sequence voltage. [ABSTRACT FROM AUTHOR]

The article presents a novel carrier-based pulsewidth modulation technique for multiphase neutral point clamped converters. The technique is aimed to actively control the neutral point (NP) potential while supplying the desired set of line-to-line voltages to the load. Standard techniques are either based on the sole common mode voltage injection or on the sole multistep switching mode; contrarily, the proposed algorithm combines these two approaches to take advantage of their main benefits. The technique performs well for each number of phases, for each modulation index, and for each type of load. It can control in closed-loop the NP voltage to any desirable value with a reduced number of switching transitions. The proposed approach has been experimentally validated and compared with other carrier-based algorithms. [ABSTRACT FROM AUTHOR]

In applications, where bidirectional power flow is not required, unidirectional pulsewidth modulated (PWM) rectifiers are advantageous in terms of power density, hardware simplicity, and reliability compared to the conventional PWM rectifiers. For high-power medium-voltage applications, a discontinuous pulsewidth modulation (DPWM) strategy is useful in reducing the switching loss. This article proposes a DPWM strategy for a recently proposed five-level unidirectional rectifier. The rectifier is analyzed in the space vector (SV) domain to determine the switching sequences for DPWM. Two such DPWM sequences (i.e., DPWMA and DPWMB) are identified. Implementation of these DPWM sequences in the SV domain is known to be very computation intensive. Therefore, carrier-based implementation of both the DPWM strategies is proposed, which are derived following the SV approach. The proposed strategies are found to be very simple with very few computations. A new voltage-balancing method for the dc-link capacitors is also proposed in this article. Performances of these DPWM strategies over the entire operating range are predicted analytically and verified experimentally. This article is accompanied by MATLAB files demonstrating various performance indexes of the proposed DPWM sequences. [ABSTRACT FROM AUTHOR]

The present paper provides a solution to operate multilevel dual active bridge (ML-DAB) converters built upon neutral point clamped switching legs in a full-bridge disposition and with any number of levels on either side of the converter. The main issue of such converters is addressing the inherent unbalance of the dc-link capacitor voltages, which hinders the proper operation and optimum utilization of the converter. The proposed solution comprises a generalized to N levels modulation and control scheme that allows operating these converters, while guaranteeing the proper balance of the dc-link capacitor voltages. The suitability of the proposed solution is verified through simulation and experimental tests performed in five different converter configurations, three of them with an asymmetric number of voltage levels, proving that capacitor voltage balance is achievable in a wide range of operation conditions. Moreover, the efficiency of the ML-DAB converters is demonstrated to be superior to the conventional two-level DAB case. [ABSTRACT FROM AUTHOR]

This paper proposes a three-phase, five-level, non-regenerative pulsewidth modulated rectifier using only two active switches (minimum required) per phase, which drastically reduces gate driver requirement and hardware complexity. It draws sinusoidal input current at close to unity power factor. All the semiconductor devices are rated at only one fourth of the dc-link voltage, and none of them requires any transient voltage balancing snubber. A total of 8 out of the 14 diodes per phase undergo soft switching transition under all operating conditions, which increases its efficiency. No extra hardware circuitry for balancing the flying capacitors (FCs) or the dc-link mid-point voltage are required, which further reduces hardware complexity and increases the conversion efficiency. The proposed topology does not need any sophisticated startup procedure for charging the FCs either, which solves the problem of semiconductor overvoltage during starting. A 3-kW laboratory prototype is built to experimentally verify the proposed topology. The maximum efficiency obtained from the prototype is 98.7%, and it is always more than 96% for the load range from 15% to its rated. [ABSTRACT FROM AUTHOR]

In recent years, dc microgrids have been widely concerned for natural interface with renewable energy sources, dc loads, and energy storage systems (ESS). A novel neutral point clamped (NPC) dual-active-bridge (DAB) converter with a blocking capacitor is proposed for ESS in dc microgrids. By inserting a blocking capacitor in primary loop of the traditional NPC DAB converter, the voltage amplitudes across the primary and the secondary windings of the transformer can be matched when the voltage ratio is equal to 0.25, 0.5, 0.75, and 1. Therefore, the proposed topology can adapt to a wide range of energy storage battery voltage variations. Asymmetric pulsewidth modulation plus phase shift modulation are applied to improve the dynamic performance of the proposed converter. The phase-shift ratio between the two bridges and the asymmetric duty ratio are regulated to control the power flow of the proposed NPC DAB converter. Compared with the traditional NPC DAB converter, the proposed topology has lower transformer rms current and wider soft-switching region. Finally, experimental results from a 500-W hardware prototype are presented to verify the feasibility and the advantage of the proposed converter. Compared with the traditional NPC DAB converter, the maximum promotion of efficiency is up to 3.8%. [ABSTRACT FROM AUTHOR]

This paper presents a pulse-width modulation strategy to eliminate the common mode voltage (CMV) with reduced CMV spikes in multilevel inverters since a high CMV magnitude and its fast variations dv/dt result in bearing failure of motors, overvoltage at motor terminals, and electromagnetic interference (EMI). The proposed method only utilizes the zero CMV states in a space vector diagram and it is implemented by a carrier-based pulse-width modulation (CBPWM) method. This method is generalized for odd number levels of inverters including neutral-point-clamped (NPC) and cascaded H-bridge inverters. Then it is extended to the over-modulation mode. The over-modulation mode is implemented by using the two-limit trajectory principle to maintain linear control and to avoid look-up tables. Even though the CMV is eliminated, CMV spikes that can cause EMI and bearing current problems still exist due to the deadtime effect. As a result, the deadtime effect is analyzed. By taking the deadtime effect into consideration, the proposed method is capable of reducing CMV spikes. Simulation and experimental results verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

Nonregenerative pulsewidth-modulated (PWM) rectifiers are increasingly being considered for applications, where the power flow is unidirectional, such as power supplies for telecommunications, X-ray, the machine-side converter for wind energy conversion systems, etc. They use fewer active switches, which increase their power density and reduce cost. This paper proposes a novel reduced switch topology for a multilevel (five-level or higher) nonregenerative PWM rectifier. It uses only four controlled switches and eight diodes per phase for a five-level rectifier. Half of the diodes are naturally commutated (zero current switching) at the line frequency, which reduces switching losses. This topology has several other advantages compared to similar topologies reported in the literature, such as minimum voltage stress across the devices, elimination of transient voltage-balancing snubbers, no extra hardware for balancing the flying capacitors, the dc-link mid-point voltage, etc. In this paper, switching cycle average modeling and the carrier-based modulation strategy for this rectifier are also presented to maintain a balanced dc link and to regulate flying capacitor voltages, while achieving unity displacement factor at the rectifier input terminals. The overall performance of the rectifier is verified by experimental results. [ABSTRACT FROM AUTHOR]

Three-level converters typically feature low switching loss and small filter size. In order to realize a high-power-density design for three-level converters, SiC MOSFETs may be selected instead of using Si insulated-gate bipolar transistors. However, all-SiC-MOSFET-based converters suffer from extremely high total cost. In this paper, a SiC MOSFET and Si device hybrid active neutral-point-clamped (ANPC) converter is proposed. It consists of four Si active switches and only two SiC MOSFETs. Thus, it has lower total cost compared to the all-SiC-MOSFET-based ANPC converter. Furthermore, a dedicated modulation scheme is proposed to completely move all the switching events from Si devices to SiC MOSFETs by using redundant switching states. As a result, the switching losses are significantly reduced and extremely high efficiency is achieved. The proposed converter has fully utilized the low-switching-loss advantage of SiC MOSFETs and the low-cost advantage of Si devices, which shows significant superiority in high-end grid-connected inverter and rectifier applications. [ABSTRACT FROM AUTHOR]

Presently renewable energies have taken a special place in the world and most of the Distributed Generations (DGs) used in the interconnected power system are utilized, renewable energy resources. Due to the DG‟s advantages, including use of renewable energy such as, clean nature, does not pollute environment and having endless nature the use of these renewable resources to produce electrical energy in the world are increasing in day to day life. One problem with such Distributed generators is an unintentional islanding phenomenon. Islanding occurs when a Distributed Generation continues to energize an isolated part of a power system even after it was disconnected from the main grid, which is surrounded by unpowered lines. Since islanding can cause hazardous conditions for people and equipment which is connected to it. As per IEEE 1547 DG Interconnection standards, islanding should be quickly detected within 2 seconds, by protective relays and inverters that are part of the DG system. In this paper, a new passive method to identify islanding states has been proposed, based on the rate of change of frequency analysis (ROCOF) for a multilevel inverter based solar distributed generation systems. This method is efficient for both connecting DGs to the network with or without the Inverter. This method is more efficient than the existing methods and reducing the Non Detection Zone (NDZ), which is the disadvantage of existing passive methods and also clearly differentiating between the Islanding and Non-islanding events. The simulation results, which are carried on the MATLAB/Simulink environment shows the performance of the proposed method [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) have replaced conventional two-level inverters for medium-voltage high-power industrial applications. One of the best modulation techniques for MLIs is the space vector modulation (SVM). Although SVM has its own advantages, it has been overlooked for much simpler carrier-based modulation schemes in the industry. Nearest level modulation (NLM) is a simple alternative, which is functionally similar to SVM. In this paper, a new generalized SVM algorithm is presented, in which the SVM is achieved using the concept of NLM. A generalized switch matrix is introduced to derive gate pulses for the inverter, which further simplifies the algorithm. The algorithm is tested and verified for a three-phase, three-level, and five-level neutral-point-clamped inverters in both simulation and hardware. [ABSTRACT FROM PUBLISHER]

This paper presents a solution for the voltage balance problem of the series-connected devices that can be applied to multilevel converters in which the series-connected devices need to block twice their switched voltage. The solution is based on two ideas, the control of the switching commands to achieve proper switching losses balance and the use of additional circuitry to achieve proper voltage balance during their blocking state. The proposed strategy is experimentally validated into a 5-level multipoint clamped full-scale converter. However, it can be used in any other converter topology in which the devices need to block twice their switched voltage. [ABSTRACT FROM PUBLISHER]

In this letter, space vector pulse width modulation (SVPWM) and virtual SVPWM (VSVPWM) for the neutral-point-clamped (NPC) three-level inverter (TLI) are reviewed briefly. The relationship between VSVPWM and carrier-based PWM is revealed based on the PWM model of TLI with NP current equation. Then, carrier-based VSVPWM (CB_VSVPWM) is proposed. The CB_VSVPWM is implemented by comparing double modulation waves with a single carrier, and the two modulation waves for each phase are deduced. The CB_VSVPWM can simplify the implementation of VSVPWM to a great extent. Moreover, comparisons between SVPWM and CB_VSVPWM are provided in detail. At last, the simple method proposed in this letter is verified by experiments. [ABSTRACT FROM AUTHOR]

This paper proposes a method for calculating selective harmonic elimination (SHE) angle solutions applied to multilevel voltage waveforms (of more than three levels of voltage): Phase-shifted SHE (PS-SHE). This technique is based on the calculation of simple SHE angles, increasing the number of levels and minimized harmonics by means of phase shift application. Compared to classical calculation, continuous SHE solution can be achieved for the whole modulation index range. Added to this, dc-link voltages balancing strategy is proposed for converters based on single-phase H-bridge (HB) configurations with multilevel (more than two levels) arms, using SHE. It is based on a prediction of the neutral point current and a hysteresis band. This strategy does not increase the number of commutations and shares them equally among the arms inside the HB. The good performance of the two proposed techniques (PS-SHE and dc-link neutral point regulation strategy) are proven into a downscaled five-level HB neutral-point-clamped (5L HNPC) converter topology. The carried out tests prove the suitability of the proposed techniques. [ABSTRACT FROM AUTHOR]

Low reliability is one of the major concerns of multilevel inverter due to the requirement of a large number of semiconductor devices as compared to two-level inverters. Thus, in this paper, a novel topology of multilevel inverter is proposed that can tolerate both open and short-circuit faults on its switches. The proposed topology also reduces dc sources and capacitors as compared to the conventional and recently proposed fault-tolerant topologies. Two types of solutions are provided in order to make the proposed topology fault tolerant; first provides a partial solution to fault, while the second provides a complete solution to fault. In addition, a novel switching strategy is proposed to reduce the amount of capacitor voltage ripples under normal and postfault conditions. Also, the proposed switching scheme offers an additional advantage of self-voltage balancing of its capacitor voltage both under normal as well as postfault conditions. To validate the proposed concepts, simulation and experimental analysis are carried out and different results are presented to show the viability of the proposed topology under normal operation, during fault and postfault conditions. [ABSTRACT FROM PUBLISHER]

Marine energy conversion systems are highlighted among nonconventional renewable energy sources for their availability and energy density. Most marine energy conversion systems are based on multigenerator units or arrays, projected to inject power to the grid in the megawatt range. The current solution for regulating generators and managing power output is the use of two-level voltage-source converters in a back-to-back configuration for each generator. This work presents the model, control scheme, and experimental validation of a configuration, which is able to interface medium-voltage high-power multigenerator marine energy conversion systems to the grid at medium-voltage high-power levels. The configuration is based on a two-step rectifier/boost converter for each generator and a multilevel inverter that merges and manages the multiple power outputs from the multigenerator section of the system. The multilevel inverter is responsible for controlling power flow to the grid and provides regulated medium-voltage high-power injection. [ABSTRACT FROM AUTHOR]

The reduced capability of multilevel converters with more than one intermediate node to balance the dc-link capacitors voltage, as well as the lack of standard modulation methods to improve their balancing performance, makes these converter topologies unattractive for real power applications. This is especially true when the load demands active power. One of these topologies is the five-level multipoint clamped (5L-MPC) converter. The back-to-back (B2B) configuration of two 5L-MPC converters and the use of a space vector modulation (SVM) that exploits the voltage balancing capability of the redundant switching vectors extend the operation conditions range in which a proper voltage balance can be achieved. However, if practical modulation restrictions are considered (limitation of voltage steps, dead times, switching losses, etc.), the voltage balance cannot be achieved for all operation conditions. In this paper, an SVM which takes into account practical restrictions is proposed. In order to guarantee the voltage balance at any operation condition, the grid-side rectifier exchanges reactive power with the grid-side LCL filter. Thus, the voltage balance of the dc-link is guaranteed while a unity grid-side power factor is achieved. The proposed modulation scheme and the voltage balancing strategy are experimentally validated in a 6.6 kV 1.5 MW 5L-MPC B2B converter. [ABSTRACT FROM AUTHOR]

This paper proposes a sliding-mode control (SMC)-based scheme for the variable-speed direct-driven wind energy conversion systems (WECS) equipped with a permanent magnet synchronous generator connected to the grid. In this paper, diode rectifier, boost converter, neutral point clamped inverter, and L filter are used as the interface between the wind turbine and grid. This topology has abundant features such as simplicity for low- and medium-power wind turbine applications. It is also less costly than back-to-back two-level converters in medium-power applications. The SMC approach demonstrates great performance in complicated nonlinear systems control such as WECS. The proposed control strategy modifies reaching law (RL) of the sliding mode technique to reduce chattering issue and to improve total harmonic distortion property compared to conventional RL SMC. The effectiveness of the proposed control strategy is explored by simulation study on a 4-kW wind turbine, and then verified by experimental tests for a 2-kW setup. [ABSTRACT FROM PUBLISHER]

The three-level (3L) neutral-point-clamped (NPC) converter, introduced by Nabae in 1981, has become the most popular converter topology for high-power medium-voltage industrial drives. Responsible for driving key processes in various industries, high availability of these converters is mandatory, since their maintenance or replacement implies downtimes incompatible with the requirements of the production processes. In this context, this paper discusses a thermal management approach to a fault-resilient design of the 3L integrated gate-commutated thyristor-based NPC converters. The main goal is to reduce the damage extension and restrict the damage pattern within the NPC bridge in case of failures or malfunction of currently employed protection schemes. It is shown that the thermal stress caused by the short-circuit currents can be managed, easing the selectivity and tracing of the damaged components, thus reducing the overall converter downtime and maintenance costs. [ABSTRACT FROM PUBLISHER]

This paper presents a general comparison procedure for medium voltage - high power multilevel converter topologies and semiconductors, which is mainly based on analyzing the performance limits of the converters output characteristics such as the output voltage, current, active power, efficiency, etc. Afterwards, the general procedure is applied to compare some of the most relevant converter topologies oriented to a 6.6 kV drive application supplying quadratic torque loads and using 4.5 kV IGBT modules. The paper concludes evaluating the comparison factors of the different converter topologies and selected semiconductors obtained by the proposed procedure. The proposed procedure can potentially be extrapolated to any desired application framework. [ABSTRACT FROM PUBLISHER]

A three-phase dc–dc converter based on the three-phase neutral point clamped (NPC) commutation cell is proposed, which is intended for use in applications where the energy from a medium dc bus voltage needs to be processed. In this paper, all six continuous conduction modes (CCMs) are described, presenting the main waveforms and equations. For the discontinuous conduction modes the main equations are also provided for a complete converter characterization. Experimental results for a 10 kW, 800 V input voltage, 200 V output voltage, 91% efficiency, 40 kHz laboratory prototype are also presented to verify the theoretical analysis carried out. [ABSTRACT FROM AUTHOR]

Neutral point clamped (NPC), three level converters with insulated gate bipolar transistor devices are very popular in medium voltage, high power applications. DC bus short circuit protection is usually done, using the sensed voltage across collector and emitter (i.e., VCE sensing), of all the devices in a leg. This feature is accommodated with the conventional gate drive circuits used in the two level converters. The similar gate drive circuit, when adopted for NPC three level converter protection, leads to false VCE fault signals for inner devices of the leg. The paper explains the detailed circuit behavior and reasons, which result in the occurrence of such false VCE fault signals. This paper also illustrates that such a phenomenon shows dependence on the power factor of the supplied three-phase load. Finally, experimental results are presented to support the analysis. It is shown that the problem can be avoided by blocking out the VCE sense fault signals of the inner devices of the leg. [ABSTRACT FROM PUBLISHER]

The neutral-point (NP) potential of the three-level neutral-point-clamped converters is needed to maintain balancing. Zero-sequence voltage is the only freedom degree when carrier-based pulsewidth modulation is utilized. Appropriate zero-sequence voltage should be identified to control the NP potential. The relationship between the neutral current and injected zero-sequence voltage is studied comprehensively, and two balancing algorithms of NP potential, respectively adopting searching-optimization and interpolation methods, are presented. The theoretical optimum zero-sequence voltage for controlling NP potential can be obtained by the latter proposed algorithm. Simulation and experimental results are shown to verify the validity and practicability of the proposed algorithms. [ABSTRACT FROM AUTHOR]

The paper describes a new discontinuous carrier-based pulsewidth modulation (PWM) method for use in variable frequency drives (VFD) driven by three-level inverters. The method introduces three different switching patterns for the full range of operating speeds. Depending on the actual operating speed, the proposed algorithm is developed to select the most suitable PWM switching pattern that improves the VFD performance. This results in low imbalance in the dc-link capacitor voltage, and low current distortions without increasing switching losses. Theory, simulation, and experimental results are presented. [ABSTRACT FROM AUTHOR]

This paper presents the optimal control of the ac currents, the dc voltage regulation, and the dc capacitor voltage balancing in a three-level three-phase neutral point clamped multilevel converter for use in power quality applications as an active power filter. The ac output currents and the dc capacitor voltages are sampled and predicted for the next sampling time using linearized models and considering all the 27 output voltage vectors. A suitable quadratic weighed cost function is used to choose the voltage vector that minimizes the ac current tracking errors, the dc voltage steady-state error, and the input dc capacitor voltage unbalancing. The obtained experimental results show that the output ac currents track their references showing small ripple, a total harmonic distortion (THD) of less than 1%, harmonic contents that are 46 dB below the fundamental, and almost no steady-state error (0.3%). The capacitor voltages are balanced within 0.05%, and the balancing is assured even when redundant vectors are not chosen. Near-perfect capacitor dc voltage balancing is obtained while reducing current harmonic distortion. Some experimental evidence of robustness concerning a parameter variation was also found, with the optimum controller withstanding parameter deviations from +100% to -50%. Compared to a robust sliding mode controller, the optimal controller can reduce the THD of the ac currents or reduce the switching frequency at the same THD, being a suitable controller for power quality in medium-voltage applications. [ABSTRACT FROM AUTHOR]

Multilevel inverters are increasingly being used in high-power medium voltage applications due to their superior performance compared to two-level inverters. Among various modulation techniques for a multilevel inverter, the space vector pulsewidth modulation (SVPWM) is widely used. However, the implementation of the SVPWM for a multilevel inverter is complicated. The complexity is due to the difficulty in determining the location of the reference vector, the calculation of on-times, and the determination and selection of switching states. This paper proposes a general SVPWM algorithm for multilevel inverters based on standard two-level SVPWM. Since the proposed multilevel SVPWM method uses two-level modulation to calculate the on-times, the computation of on-times for an n-level inverter becomes easier. The proposed method uses a simple mapping to achieve the SVPWM for a multilevel inverter. A general n-level implementation is explained, and experimental results are given for three-level and five-level inverters. [ABSTRACT FROM AUTHOR]