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Electrical insulation of high voltage (HV) power equipment/apparatus plays very important roles in the sound functioning of power systems. Examining the insulation condition through partial discharge (PD) measurements has considerable importance as the presence of PDs in any HV systems stands for a sign of defects and degradations in electrical insulation. Generally, the PD measurements are performed with a supply voltage of normal power frequency (PF‐50/60 Hz). As an attractive alternative, the PD measurement with a very low frequency (VLF–1 Hz or lower) applied voltage has emerged as a powerful diagnostic tool. A PD event is a random physical process, it depends mostly on the availability of free electrons that triggers the PD and the presence of space charge usually originated after a discharge. As the discharge characteristics vary with the supply voltage frequency; thus, the existing interpretation knowledge at 50 Hz may or may not be directly applicable to other test frequencies, particularly in the VLF range. Therefore, to provide a general insight, this paper presents various diagnostic aspects of PD measurements, and at the end, various discharge sources (e.g., void, surface, and corona) and their behaviours under varying the test voltage frequencies are discussed in detail. [ABSTRACT FROM AUTHOR]

The traditional buffering valve for vehicle shifting mainly relies on the throttle hole and spring to control the pressure in the clutch. However, its accommodative facility and adaption are inferior. Therefore, two–dimensional (2D) digital technology is proposed to be applied to the vehicle shift buffering area, and the 2D digital buffering valve is designed. This study introduces the structure and working principle of the 2D digital buffering valve and establishes the mathematical model of the 2D digital buffering valve. The classical proportional–integral–differential control algorithm is adopted and Matlab/Simulink is used to simulate its control model. Finally, an experimental study is carried out. The study results show that when the frequency is 50 Hz, the amplitude of the valve output pressure decays to −3 dB, and when the frequency is 60 Hz, the phase of the valve output pressure lags by 90°. The output of the 2D digital buffering valve meets the requirement of the change of the oil pressure in the clutch during the vehicle shifting process. The control precision of its buffering pressure characteristic reaches 15%. The simulation and test results of the buffering valve are consistent, which verifies the correctness of the simulation model.

High permittivity materials are currently in use for mitigation of electrical stress in high-voltage apparatus and energy storage systems. In this work, epoxy-based high permittivity nanocomposites with Barium titanate (BaTiO(3)) nanofillers are considered, for the purpose of stress mitigation. Uniform dispersion of the fillers in the polymer up to 10% by volume is achieved. Apart from the use of as-received fillers, the effect of using surface-functionalised nanoparticles (with 3-glycidoxypropyltrimethoxy-silane) before use is also investigated. The nanocomposite is characterised in terms of its complex permittivity, DC conductivity, short-term AC breakdown strength and space charge accumulation, to gauge its suitability for use in high-voltage insulation. Complex permittivity is measured using broadband dielectric spectroscopy over a broad frequency range of 1 mHz to 1 MHz. DC conductivity is studied from polarisation–depolarisation current measurements. Short-term AC breakdown strength tests are performed at power frequency (50 Hz). Space charge density along the sample thickness is obtained using pulsed electro-acoustic technique. A computational case-study is presented to show the feasibility of using the high permittivity nanocomposite for electric stress control in high-voltage equipment (viz., at mounting flanges of 69 kV bushings).

The traditional buffering valve for vehicle shifting mainly relies on the throttle hole and spring to control the pressure in the clutch. However, its accommodative facility and adaption are inferior. Therefore, two–dimensional (2D) digital technology is proposed to be applied to the vehicle shift buffering area, and the 2D digital buffering valve is designed. This study introduces the structure and working principle of the 2D digital buffering valve and establishes the mathematical model of the 2D digital buffering valve. The classical proportional–integral–differential control algorithm is adopted and Matlab/Simulink is used to simulate its control model. Finally, an experimental study is carried out. The study results show that when the frequency is 50 Hz, the amplitude of the valve output pressure decays to −3 dB, and when the frequency is 60 Hz, the phase of the valve output pressure lags by 90°. The output of the 2D digital buffering valve meets the requirement of the change of the oil pressure in the clutch during the vehicle shifting process. The control precision of its buffering pressure characteristic reaches 15%. The simulation and test results of the buffering valve are consistent, which verifies the correctness of the simulation model. [ABSTRACT FROM AUTHOR]

A generalised space vector pulse width modulation (SVPWM) framework for the realisation of all double switching states with a memory-optimised method is proposed to reduce the total harmonic distortion (THD) and to provide neutral point voltage balancing for three-level NPC voltage source inverter (VSI). The proposal provides an efficient SVPWM implementationwith reduced hardware requirement and zero increase in software complexity in comparison to the existing schemes. Microcontroller analogue-to-digital converter (ADC) hardware replaces multichannel ADC and associated Field programmable gate array hardware in this proposal. The proposed method follows digital control architecture and eliminates the need to sample phase voltages separately. The proposed algorithm samples rms voltage of one phase and generates eight bit modulation index command by a suitable compensation algorithm. The implemented SVPWM algorithm takes the modulation index command value and generates phase voltage values by multiplying with the stored sine angle values. Gate pulses are generated in the proposed implementation by the hardware pulse width modulation (PWM) block and there is no need for digital-to-analogue converter. The proposed strategy is validated with a fundamental frequency of 50 Hz on a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI using low-cost PIC microcontroller. The superiority of the proposed method lies in providing an efficient three-level SVPWM implementation with reduced THD, neutral point voltage balancing, reduced hardware requirement, small lookup table and zero increase in the software computing overhead.

Large-scale electricity has fed into Central and Southern China through DC transmission lines. Any one of the DC transmission lines suddenly outage will result in a large proportion of power-shortage. Recently, there are many DC harmonic protection misoperations caused by AC disturbance, resulting in DC transmission line exit operation. Therefore, it is necessary to analyse the effect of AC disturbance on DC harmonics and study methods for DC harmonic protections. In this study, based on the theory of switching function, the harmonics interaction in AC–DC systems is studied. The cause of DC line harmonic protection misoperation during unusual AC disturbances, such as inrush current and short circuit, is revealed. The DC line 50 Hz harmonic protection misoperates frequently due to inrush current on site. Taking it for example, an improved method using the second harmonic voltage in AC system bus is proposed. In this method, the 50 Hz harmonics generated by inrush current can be accurately identified by judging the correlation between the AC harmonic voltage and the DC line harmonic current. By automatically adjusting the threshold value of protection, the misoperation can be prevented effectively without affecting the original protection performance. The simulation results verify the correctness of the method.

This study presents a newly developed modular system for control of power electronic amplifiers in high-power, high-frequency power hardware in the loop experiments. The proposed design comprises computational nodes connected via multi-gigabit fibre-optic links. Nodes are modular and reconfigurable, allowing interfacing with a range of sensors and actuators, typically voltage and current sensors, and switching converters. The system has been designed for scalability to permit arbitrarily high power ratings and fidelity to be achieved through paralleling and interleaving of multiple power converter modules, targeting an ultimate sample and control rate of 1 MHz. Experimental validation is presented using a two-node configuration to facilitate a power electronic experiment operating at 120 V(rms) and 10 A(rms), with a fundamental frequency of 50 Hz and frequency content up to the 11th harmonic.

Traditional directional relays of AC transmission lines are usually based on 50 Hz information in frequency domain in China. However, this conventional approach cannot provide the correct fault direction for the lines connected to wind farm because of the fault characteristics of the wind power system, that is, frequency deviation, variation of system impedance, weak feed feature, and so on. Then, the conventional approach of finding the phase angle between the fault current and a voltage signal will not identify the correct fault direction. To solve this problem, this paper proposes a novel fault direction identification method in time domain. Based on the RL model of transmission lines, opposite-side voltages of the line can be derived with the measuring current and voltage at wind farm terminal after the fault. Then, the adjusted cosine similarity between the calculation voltage based on the RL model and the memory voltage can be acquired. If the correlation between the calculation voltage and the memory voltage is close to 1, it is a reverse fault. Otherwise, it is a forward fault. Finally, the proposed novel fault direction identification criterion is verified by the PSCAD/EMTDC-based simulation results.

A generalised space vector pulse width modulation (SVPWM) framework for the realisation of all double switching states with a memory-optimised method is proposed to reduce the total harmonic distortion (THD) and to provide neutral point voltage balancing for three-level NPC voltage source inverter (VSI). The proposal provides an efficient SVPWM implementationwith reduced hardware requirement and zero increase in software complexity in comparison to the existing schemes. Microcontroller analogue-to-digital converter (ADC) hardware replaces multichannel ADC and associated Field programmable gate array hardware in this proposal. The proposed method follows digital control architecture and eliminates the need to sample phase voltages separately. The proposed algorithm samples rms voltage of one phase and generates eight bit modulation index command by a suitable compensation algorithm. The implemented SVPWM algorithm takes the modulation index command value and generates phase voltage values by multiplying with the stored sine angle values. Gate pulses are generated in the proposed implementation by the hardware pulse width modulation (PWM) block and there is no need for digital-to-analogue converter. The proposed strategy is validated with a fundamental frequency of 50 Hz on a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI using low-cost PIC microcontroller. The superiority of the proposed method lies in providing an efficient three-level SVPWM implementation with reduced THD, neutral point voltage balancing, reduced hardware requirement, small lookup table and zero increase in the software computing overhead. [ABSTRACT FROM AUTHOR]

This study presents a newly developed modular system for control of power electronic amplifiers in high-power, high-frequency power hardware in the loop experiments. The proposed design comprises computational nodes connected via multi-gigabit fibre-optic links. Nodes are modular and reconfigurable, allowing interfacing with a range of sensors and actuators, typically voltage and current sensors, and switching converters. The system has been designed for scalability to permit arbitrarily high power ratings and fidelity to be achieved through paralleling and interleaving of multiple power converter modules, targeting an ultimate sample and control rate of 1 MHz. Experimental validation is presented using a two-node configuration to facilitate a power electronic experiment operating at 120 Vrms and 10 Arms, with a fundamental frequency of 50 Hz and frequency content up to the 11th harmonic. [ABSTRACT FROM AUTHOR]

Identification of partial discharge (PD) sources in stator insulation is an important and challenging task. Distinct phase‐resolved PD (PRPD) pattern of different PD sources are well established at power frequency (50/60 Hz) and can help to identify each source. In this study, different sources of PD commonly found in stator insulation were created on a 6.6 kV epoxy‐mica stator coil. Each PD source was experimentally investigated at a variable excitation frequency in the range of 50–0.1 Hz. PRPD pattern and PD parameters such as integrated charge per cycle and number of discharge pulses per cycle of each discharge source were compared at different frequencies. The comparison suggests that the parameter of each PD source was dependent on excitation frequency. Some discharge sources have shown a distinct variation in their characteristics with excitation frequency. These distinct characteristics are additional information to the existing ones, which will help to correlate PD characteristics with the source of PD in stator insulation. [ABSTRACT FROM AUTHOR]

This study presents a methodology to consider the impedance of a grid in power‐hardware‐in‐the‐loop experiments to validate power converter control in the presence of harmonics or resonances in the network impedance. As the phenomena to emulate are in a large frequency range, the skin effect in conductors has to be taken into account. A procedure is developed to model the network. Then, the model is simplified to reduce the computation requirements and discretised for real‐time implementation. The proposed method has been applied to analyse the harmonic interactions due to on‐board converters running on a 25 kV–50 Hz railway infrastructure for frequencies from 0 to 5 kHz. The model is computed in MATLAB–Simulink, a SpeedGoat Performance Machine and a linear power supply are used for a real‐time implementation. The converter under test and the test bench are presented. Some experimental results are presented, showing the feasibility and the usefulness of the proposed approach. [ABSTRACT FROM AUTHOR]

Traditional directional relays of AC transmission lines are usually based on 50 Hz information in frequency domain in China. However, this conventional approach cannot provide the correct fault direction for the lines connected to wind farm because of the fault characteristics of the wind power system, that is, frequency deviation, variation of system impedance, weak feed feature, and so on. Then, the conventional approach of finding the phase angle between the fault current and a voltage signal will not identify the correct fault direction. To solve this problem, this paper proposes a novel fault direction identification method in time domain. Based on the RL model of transmission lines, opposite-side voltages of the line can be derived with the measuring current and voltage at wind farm terminal after the fault. Then, the adjusted cosine similarity between the calculation voltage based on the RL model and the memory voltage can be acquired. If the correlation between the calculation voltage and the memory voltage is close to 1, it is a reverse fault. Otherwise, it is a forward fault. Finally, the proposed novel fault direction identification criterion is verified by the PSCAD/EMTDC-based simulation results. [ABSTRACT FROM AUTHOR]

Large-scale electricity has fed into Central and Southern China through DC transmission lines. Any one of the DC transmission lines suddenly outage will result in a large proportion of power-shortage. Recently, there are many DC harmonic protection misoperations caused by AC disturbance, resulting in DC transmission line exit operation. Therefore, it is necessary to analyse the effect of AC disturbance on DC harmonics and study methods for DC harmonic protections. In this study, based on the theory of switching function, the harmonics interaction in AC–DC systems is studied. The cause of DC line harmonic protection misoperation during unusual AC disturbances, such as inrush current and short circuit, is revealed. The DC line 50 Hz harmonic protection misoperates frequently due to inrush current on site. Taking it for example, an improved method using the second harmonic voltage in AC system bus is proposed. In this method, the 50 Hz harmonics generated by inrush current can be accurately identified by judging the correlation between the AC harmonic voltage and the DC line harmonic current. By automatically adjusting the threshold value of protection, the misoperation can be prevented effectively without affecting the original protection performance. The simulation results verify the correctness of the method. [ABSTRACT FROM AUTHOR]

This study presents the evaluation of performance indexes of a novel synchronous reluctance motor (NSynRM) that has an axially sinusoidal rotor lamination shape. The stator of a 5.5 kW, 4‐pole, 50 Hz conventional three‐phase squirrel cage induction motor, with distributed and chorded by one slot, double‐layer winding, is used for both standard and NSynRMs. Owing to the nature of the sinusoidal rotor structure, the three‐dimensional finite element analysis (FEA) is utilised to study the electromagnetic parameters of interests. The NSynRM with sinusoidal rotor shape results is compared with the standard SynRM without cut‐off on the q‐axis. The FEA results are validated by means of practical measurements. [ABSTRACT FROM AUTHOR]