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Wireless biosensors are playing a pivotal role in health monitoring, disease detection and management. The development of wireless biosensor nodes and networks strongly relies on the design of novel low-power, low-cost and flexible CMOS sensor readouts. This brief presents a CMOS potentiostat that integrates a control amplifier, a dual-slope ADC and a wireless unit on the same chip. It implements a novel time-based readout scheme, whereby the counter of the dual-slope ADC is moved to the receiver and the sensor current is encoded in the timing between two wireless pulses transmitted via pulse-harmonic modulation across an inductive link. Measured results show that the potentiostat chip can resolve a minimum input current of 10pA at a sampling frequency of 125 Hz and a power consumption of 12 μW. [ABSTRACT FROM AUTHOR]

We introduce a hybrid CMOS-graphene sensor array for subsecond measurement of dopamine via fast-scan cyclic voltammetry (FSCV). The prototype chip has four independent CMOS readout channels, fabricated in a 65-nm process. Using planar multilayer graphene as biologically compatible sensing material enables integration of miniaturized sensing electrodes directly above the readout channels. Taking advantage of the chemical specificity of FSCV, we introduce a region of interest technique, which subtracts a large portion of the background current using a programmable low-noise constant current at about the redox potentials. We demonstrate the utility of this feature for enhancing the sensitivity by measuring the sensor response to a known dopamine concentration in vitro at three different scan rates. This strategy further allows us to significantly reduce the dynamic range requirements of the analog-to-digital converter (ADC) without compromising the measurement accuracy. We show that an integrating dual-slope ADC is adequate for digitizing the background-subtracted current. The ADC operates at a sampling frequency of 5–10 kHz and has an effective resolution of about 60 pA, which corresponds to a theoretical dopamine detection limit of about 6 nM. Our hybrid sensing platform offers an effective solution for implementing next-generation FSCV devices that can enable precise recording of dopamine signaling in vivo on a large scale. [ABSTRACT FROM PUBLISHER]

Within this work we developed a universal integrated photodetector platform for the detection, amplification and digitalization of various optical data signals. The concept features two internal plus two external photodiodes, signal amplification and output stages each. For each application a combination of the optimal input detector, the suitable amplifier plus gain setting and the appropriate output stage can be combined individually.

Output of a typical Wheatstone bridge, when it is connected to measure from a single or a dual resistive element, possesses non-linear characteristic. This paper presents a novel signal conditioning scheme, which provides a linear-digital output directly from the resistive sensor(s) that are connected in such bridge configurations. In the present scheme, the input stage of a dual-slope analog-to-digital converter (DSADC) is suitably augmented to incorporate the quarter-bridge and (or) half-bridge containing the resistive sensor as an integral part of the DSADC. A combination of the current mode excitation and wisely selected integration and de-integration operations of the DSADC enable to achieve linearization in the digitization process itself, leading to an overall reduction in the complexity level and number of blocks used keeping the high accuracy unaltered. A detailed analysis has been conducted to quantify the effect of various sources of errors in the output of the DSADC. The details are presented in the paper. The proposed method not only provides a linear digital output but also drastically reduces the effect on the output due to the lead wires that connect the Wheatstone bridge and the DSADC. Thus, the proposed scheme is well suited for the situations where the sensor(s) is (are) remotely located at a distance. Simulation studies as well as results from a prototype developed and tested establish the practicality of the proposed scheme. The inherent non-linearity of the Wheatstone bridge is reduced by nearly two orders of magnitude. [ABSTRACT FROM PUBLISHER]

This paper reports a single-chip solution for the implementation of radiation-tolerant CMOS front-end electronics (FEE) for applications requiring the acquisition of base-band sensor signals. The FEE has been designed in a 0.35~\mu \text m CMOS process, and implements a set of parallel conversion channels with high levels of configurability to adapt the resolution, conversion rate, as well as the dynamic input range for the required application. Each conversion channel has been designed with a fully-differential implementation of a configurable-gain instrumentation amplifier, followed by an also configurable dual-slope ADC (DS ADC) up to 16 bits. The ASIC also incorporates precise thermal monitoring, sensor conditioning and error detection functionalities to ensure proper operation in extreme environments. Experimental results confirm that the proposed topologies, in conjunction with the applied radiation-hardening techniques, are reliable enough to be used without loss in the performance in environments with an extended temperature range (between −25 and 125 °C) and a total dose beyond 300 krad. [ABSTRACT FROM PUBLISHER]