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This paper presents an advanced yet simple digital pre-distortion (DPD) technique for digital I/Q transmitters (DTXs). Exploiting the I/Q orthogonality, an effective 2×1-D DPD procedure is proposed to bypass the exhaustive 2-D search of the entire constellation diagram. Utilizing this technique, a four-way Doherty DTX is linearized. Measurement results demonstrate that for a non-contiguous six-carrier OFDM-QAM signal with aggregated bandwidth of 150MHz, the ACPR is better than -47.3dBc, and EVM is better than -41/-40dB for channel-1/-6, respectively., Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics

This paper proposes a power amplifier (PA) correction technique to recover from load mismatch. It utilizes a main PA, two auxiliary PAs, and a coupler. By adjusting the input drive levels of the PAs it can recover the output power and to a great extent the efficiency of the main PA even when exposed to 2:1 VSWR mismatch conditions. When connected to 50O loading, only the main PA is active, for impedances below or above 50 O, besides the main amplifier, one of the auxiliary PAs is also activated. The power generated by the auxiliary PA adds in phase to the output power of the main PA, as such allowing the output power to be constant at the expense of a minor efficiency penalty., Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics

A current-mode direct-digital RF modulator (DDRM)-based transmitter (TX) architecture is proposed in this article for energy-efficient wireless applications. To demonstrate its key principles, a 2×13 bit demonstrator is implemented in a 40-nm CMOS technology. This DDRM can operate standalone or as a driver for a common-gate (CG)/common-base (CB) power amplifier (PA). The proposed DDRM is based on current-steering radio frequency digital-to-analog converters (RFDACs) that feature an extra current division path to allow the generation of the optimum current-mode class-B drive profile for the final CG/CB PA, facilitating energy-efficient TX operation without compromising linearity. For this purpose, the DDRM uses signed-IQ mapping combined with a class-B harmonic rejection (HR) technique. In addition, an advanced dynamic biasing technique is introduced to further enhance the TX line-up efficiency in deep power back-off (PBO) region. The DDRM driver standalone can provide 19.6-dBm RF peak output power. It supports a '160-MHz 256-QAM' signal at 2.4 GHz with an adjacent channel leakage ratio (ACLR) of -40.3 dBc and an error vector magnitude (EVM) of -33 dB, without using any digital pre-distortion (DPD). When connected to a CB SiGe PA, the overall TX line-up achieves an output power of 27 dBm and an overall TX system efficiency of 20%. This DPD-free TX line-up achieves an ACLR of -37.7 dBc and an EVM of -30 dB, respectively, when operating with an '80-MHz 64-QAM' signal at 2.2 GHz., Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics, Tera-Hertz Sensing

This paper presents a 40nm CMOS mm-wave 3-way Doherty power amplifier (PA) suitable for 5G mm-wave transmitters. It features a bandwidth-enhanced technique using a compact single-supply balun-first 3-way Doherty combiner. The realized front-end with a core area of 0.77 mm2delivers a peak power/gain of more than 20 dBm/16 dB and a drain efficiency (DE) of better than 15 %/22 %/33 % at 9.5 dB/6 dB/0 dB power back-off across a 24-to-30 GHz band. At 26 GHz, it achieves an EVM/ACLR of -23.5 dB/-29.5 dBc for an 800MHz 64-OFDM signal with 9.8 dBm average output power and a 15 % average DE., Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics

By introducing three different techniques, this article, for the first time, presents a wideband highly linear receiver (RX) capable of handling blocking scenarios in fifth-generation (5G) microcell base station applications. First, a parallel preselect filter is introduced to satisfy the base station co-location blocking requirements. Next, a combination of third-order RF and baseband (BB) filters is adopted to attenuate close-in blockers by a -120 dB/dec roll-off. Finally, a translational feedback network is proposed to reduce the in-band gain ripple to below 0.5 dB and provide better than -19 dB input matching. Fabricated in the 40-nm CMOS technology, the proposed RX occupies a core area of 0.8 mm2 and consumes 108-176 mW from a 1.3 V supply over the RX's 0.5-3-GHz operating frequency. It achieves a 3-dB bandwidth of 150 MHz and a noise figure (NF) of 2.6-3.9 dB over the RX frequency range. Activating the parallel preselect filter degrades the NF by as little as 1.2 dB in the worst case. The RX shows a ≥q 97.5% throughput when receiving a 100-MS/s quadrature phase shift keying (QPSK) signal with 7.5-dB SNR and achieves a -9.7 dB error vector magnitude (EVM) while facing a -15 dBm continuous-wave (CW) blocker only 20 MHz away from the desired 100-MS/s QPSK signal with 12.3-dB SNR, thus satisfying the 3rd generation partnership project (3GPP) requirements with sufficient margin., Electronics

Recently, the so-called sub-6GHz band of the 5G new radio (NR) has been extended to 7.125GHz to address the relentless customer demand for higher data-rate communication. This demands a new design approach for the local area base-station (LA-BS) receivers (RXs) to cover a wide operating frequency range of 0.41 to 7.125GHz. Moreover, for NR bands above 3GHz, the maximum RF bandwidth (BW) is as high as 400MHz, in which a -35dBm modulated in-band (IB) blocker can be present. These impose stringent BW and IB linearity requirements for the baseband amplifiers in the LA-BS receivers. In addition to IB interferences, a -15dBm continuous-wave (CW) out-of-band (OOB) close-in blocker can also be present at 60MHz offset frequency from the passband edges, thus demanding a highly selective RX. Finally, the blocker 1dB compression point (B1textdB) becomes a key parameter for local area co-location applications in which the power of the far-out OOB blocker can be as large as -4dBm., Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics

This article presents a wideband, energy-efficient digital transmitter (DTX) suitable for multi-mode/multi-band wireless communication applications. It features various operation modes comprising Cartesian (Modes-1/-2) and multi-phase (Modes-3/-4) configurations utilizing LO clocks with different duty cycle in the interleaving/non-interleaving configurations. The multi-phase operation compromises polar and Cartesian features by mapping the I/Q signals into two non-orthogonal basis vectors with a 45° relative phase difference and a 3-bit phase selector scheme. The different operation modes are extensively analyzed and compared. Fabricated in a 40-nm CMOS process with an off-chip matching network, the proposed DTX occupies a core area of 0.72 mm2 and delivers 23.18-dBm RF peak power at 2.1 GHz from a 0.95-V supply voltage with drain/system efficiencies of 66.26%/52.59%, respectively. Utilizing a simple memory-less digital pre-distortion (DPD) for a 160-MHz four-channel 64-quadrature amplitude modulation (QAM) orthogonal frequency-division multiplexing (OFDM) signal, the DTX delivers an average P Out of 13.5/11.4/7.7/9.4 dBm, achieving an adjacent channel (power) ratio (ACL(P)R) of better than -42/-40/-40/-38 dBc and an average error vector magnitude (EVM) of -36/-34/-34/-32 dB, operating in Modes-1/-2/-3/-4, respectively. While transmitting a 200-MHz single-channel 256 (1024)-QAM OFDM signal at 2.4 GHz in Modes-1/-4, the average delivered output power is 14.11/9.29 (12.23/7.32) dBm with average drain and system efficiencies of 33.17%/26.3% (23.82%/22.83%) and 24.81%/22.85% (19.34%/18.81%), while the ACLR and EVM are better than -42/-41 (-43/-43) dBc and -34.6/-33.1 (-33.5/-33.9) dB, respectively., Electronics

Fully digital transmitters (DTXs) have the potential of replacing analog-intensive transmitter (TX) line-ups in future massive multiple-input and multiple-output (mMIMO) systems since they hold the promise of higher system integration level and energy efficiency. DTX operation so far has been limited to low RF output powers. This article introduces a concept that enables high-power DTX operation. A DTX demonstrator targeting both high output power and high efficiency is realized as a proof of concept. It is based on a custom ${V_{T}}$ -shifted laterally-diffused MOS (LDMOS) technology, which is utilized to implement a segmented high-power output stage operated in class-BE. A low-voltage high-speed 40-nm CMOS controller drives the individual output stage segments at gigahertz rates. Measurements show the promising results for the proposed high-power DTX concept and provide valuable lessons for future DTX implementations., Electronics

Recent sub-6GHz receivers (RXs) attempted to realize RF channel selection at the RX input for suppressing large close-in blockers. Although mixer-first RXs can achieve sharp RF filtering and good out-of-band (OOB) linearity, they suffer from large noise figure (NF) and high LO leakage [1] [2]. Alternatively, [3]–[5] exploited an N-path notch filter around an LNTA to simultaneously achieve low NF and a moderate channel selection at the RX input. However, their OOB IIP3 and blocker 1dB compression point (B1dS) are at least 10dB worse than the mixer-first RXs. This paper proposes an LNTA-based RX that shows a similar OOB linearity as prior art mixer-first RXs without sacrificing NF. This is achieved by (1) adding a parallel preselect filter at the RX input to improve the RF selectivity and achieve +6dBm B1dB; (2) proposing third-order RF and baseband filters to attenuate close-in blockers by a 120dB/dec roll-off; (3) introducing a feedback network to reduce the in-band (IB) gain fluctuations to <0.5dB., Accepted author manuscript, Electronics

To support wideband complex modulated signals and comply with the stringent requirements of modern communication standards in an energy-efficient manner, recently, digital transmitters (DTXs) have been explored to fully benefit from the high-speed switching and integration capabilities of nanoscale CMOS technologies [1]–[5]. These DTXs are primarily exploiting a polar or Cartesian architecture. In a polar DTX [1], [2], two eigenvectors of amplitude (p) and phase $(\phi)$ are generated from the in-phase (I) and quadrature (Q) baseband signals using non-linear coordinate rotation transformations (i.e., CORDIC). Provided that $\rho$ is constant, the achievable drain efficiency (DE) is constant (Fig. 1 top). However, polar $\text{DTXs}$ cannot manage large modulation bandwidth due to their non-linear $\mathrm{I}/\mathrm{Q}$ to $\rho/\phi$ conversion. Moreover, their phase and amplitude paths must recombine at the output stage without any delay mismatch to maintain linear operation. In contrast, Cartesian DTX variants can handle signals with large modulation bandwidth [3]. Nevertheless, their DE is lower than their polar counterparts owing to the linear combination of orthogonal I/Q vectors, yielding a 3-dB worst-case output power loss at the orthogonal (I/Q) axes. Alternatively, a multi-phase operation can be utilized that compromises polar and Cartesian features by mapping the I/Q signals into two non-orthogonal basis vectors with 45° relative phase difference and magnitudes of $\mathrm{I}_{\text{MP}}=\mathrm{I}-\mathrm{Q}$, QMP $=\sqrt{2}\mathrm{Q}$ [4]. This architecture inherits the advantages of the cartesian DTX, such as wideband operation, symmetrical, and synchronized $\mathrm{I} /\mathrm{Q}$ paths along with a DE behavior that imitates the polar case. This paper presents a multi-mode DTX that uses both Cartesian and multi-phase operation modes to target applications requiring large modulation bandwidth, decent spectral purity and average efficiency., Accepted author manuscript, Electronics

This article presents an efficient digital polar transmitter (DPTX) at mm-wave frequencies that exploit a novel N -way series Doherty combiner (SDC) to enhance its drain and system efficiency at deep power back-off (PBO). The proposed N -way SDC is scalable and can be implemented elegantly using N transformers and N-1 shunt capacitors. As a proof of concept, a four-way Doherty DPTX is realized with the proposed SDC in which four identical but independent digital phase modulators deliver a phase-modulated constant envelope signal to their corresponding digital power amplifiers to perform the required amplitude modulation. Fabricated in a 40nm CMOS process, the proposed DPTX occupies a core area of 1.1 mathrm {mm^{2}} and exhibits 18.7dBm saturated output power and <-40dBc LO feedthrough. It demonstrates a drain efficiency of 33%/36%/22% at 0/4.5/11.5dB PBO at a 29.5GHz carrier frequency. While transmitting a 300MHz 64-QAM OFDM signal with a peak-to-average power ratio of 10.7dB, the DPTX achieves 18%/8% average drain/system efficiency, -27.6dB error vector magnitude, and -27.5dBc adjacent channel leakage ratio. To the best of our knowledge, this work is the first reported mm-wave Doherty transmitter that includes the entire chain all the way from the binary data stream up to the modulated mm-wave output signal., Accepted author manuscript, Electronics

This letter presents a novel load-modulation-based 3rd-order intermodulation distortion (IMD3) cancellation technique for class-B CMOS power amplifiers (PAs). In a class-B PA, the IMD3 generated by the 3rd-order transconductance ( $g_{m3}$ ) and the gain compression have opposite signs, and thus, they can cancel each other at specific bias and loading conditions. The proposed Doherty topology allows adjusting the gain compression by modulating the effective loading, facilitating IMD3 cancellation over the entire load modulation region. The proposed approach is verified using a 28 GHz 40 nm CMOS series-Doherty PA (DPA) topology. The experimental result demonstrates 10/17 dB IMD3 improvement compared to class-B/DPA operation. Without using any digital pre-distortion, the measured EVM of the proposed technique for a 50 MHz 64-QAM OFDM signal with 8.9 dBm average output power is -38.7 dB (1.2%), which is 5.7/11 dB better than a standard class-B/DPA operation., Electronics

This article presents a wideband series-Doherty power amplifier (SDPA) for millimeter-wave (mm-wave) fifth-generation (5G) applications. It features a compact two-step impedance inverting-based series-Doherty power combiner that provides broadband close-to-perfect power back-off (PBO) efficiency enhancement. The amplitude-to-amplitude (AM-AM)/amplitude-to-phase (AM-PM) performance of the load-modulated Doherty power amplifier for broadband operation is analyzed. We also devise a post-silicon inter-stage passive validation (PSIV) approach to evaluate the mm-wave chip prototype utilizing the embedded voltage root mean square detectors. The proposed SDPA is realized in a 40-nm bulk CMOS, and it delivers 20.4 dBm PSAT with 39.1%/34% PAE at 0-/6-dB PBO. Over a 23.5-30 GHz band, its PAE is >24% at 6-dB PBO. At 27 GHz, applying a '2 GHz 16-quadratic-amplitude modulation (QAM) orthogonal frequency-division multiplexing (OFDM)' signal, the proposed SDPA generates 10.2 dBm average power with 18.9% average PAE. The average error vector magnitude is better than -24.5 dB without digital predistortion for a '400-MHz 64-QAM OFDM' signal while generating an average output power of 8.8 dBm with 15% PAE. The AM-AM/AM-PM of the realized SDPA is investigated by employing a '50-MHz 64-QAM OFDM' signal, validating our analysis and showing that the linearity limitation of DPAs is systematic and predictable. Utilizing the proposed PSIV approach, the frequency response of the input/inter-stage passive circuits is measured, indicating an excellent agreement with 3-D electromagnetic (EM) simulation results., Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics

A 40nm CMOS wideband digital Cartesian push-pull inverted Doherty operating in class-E is presented. Wideband Doherty operation is achieved over a 1.9-to-3GHz frequency band, using an off-chip power combining network. The fully digital transmitter (DTX) provides 25.3dBm peak power with a drain/DTX line-up efficiency (DE/SE) of 58.7%/44.9%, respectively, at 2.4GHz. When operated with a 160MHz 256-QAM OFDM signal, it achieves 46.1%/32.7% average DE/SE, with an ACLR and EVM better than −40.6dBc and −33.9dB, respectively, using a simple memory-less digital pre-distortion (DPD)., Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics

This letter presents a millimeter-wave (mm-wave) vector-modulated phase shifter (VMPS) for phased-array applications. To improve the phase-shift accuracy without drastically increasing design complexity, the proposed VMPS structure employs variable-gain amplifiers (VGAs) that offer 2× better resolution at their low-gain states compared to their high-gain states. A two-stage current-reused structure is also proposed to implement the desired VGAs with minimal layout complexity, negligible gain penalty, and no extra power. Moreover, the proposed VMPS can maintain its phase-shift accuracy even at lower voltage gains. Fabricated in 40-nm CMOS, the prototype core consumes 11 mW from a 1.1-V supply and occupies a core area of 0.19 mm2. At 28 GHz, with a phase resolution of 0.61°, the measured RMS phase error is 0.23° at the maximum gain and remains <0.5∘ at 9-dB gain back-off. With a fixed set of VGA’s codewords, the RMS phase error and gain variation error are, respectively, lower than 1° and 0.24-dB over a bandwidth of 23.8–30.4 GHz., Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics

This work presents an ultra-compact single-antenna FD/FDD transceivers front-end. It comprises a nonreciprocal circulator, RX, and an integrated power amplifier (PA). In the proposed circulator, we devise a ring quarter-wave transmission line topology with adjusted characteristic impedances to improve TX-to-antenna insertion loss and TX-to-RX isolation. Besides, an AND-gate switching-based N-path filter is proposed to realize the circulator's nonreciprocal gyrator while acting as a mixer-first RX. Owing to the ultra-compact N-path filter structure, the circulator occupies only 0.38mm 2 core area. Over a 27.1-to-31.1GHz band, the realized front-end offers >20dB TX-to-RX isolation while its measured TX-to-antenna insertion loss is 1.7~2.2dB. The RX path tolerates the PA's blocker signal, achieving 5dBm in-band and 13dBm out-of-band B 1dB. Moreover, the PA delivers 15.15dBm peak output power with 33% drain efficiency. Our front-end prototype occupies only 0.7mm 2 , including circulator, PA, quadrature hybrid coupler LO generators, and baseband circuits., Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics

This paper presents a design procedure for compact lumped-element 3-/4-/5-way Doherty power combiners suitable for mm-wave 5G transmitters. Among them, the 3-way Doherty power combiner is favored due to its low complexity, compact layout, and average drain efficiency at 12 dB power back-off (PBO) when implemented using lossy lumped elements. Based on the metal stack of a 40nm CMOS process, a 3-way Doherty power combiner can provide a simulated passive efficiency of more than 60% at 12 dB PBO and a 10% drain-efficiency bandwidth $(BW_{\mathrm{D}\mathrm{E}10\%})/3\mathrm{d}\mathrm{B}$ power bandwidth $(BW_{3\mathrm{d}\mathrm{B}})$ of 8/15 GHz at 30 GHz., Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics

This article presents a wideband 2× 12 -bit direct-digital RF modulator (DDRM) operating in a 0.5-to-3-GHz band for 5G transmitters. The proposed digital Cartesian modulator features an advanced IQ-mapping technique to boost RF power by 3 dB and suppress the I/Q image. To verify the proposed concept, a 40-nm CMOS prototype is implemented whose RF peak output power at 2 GHz is more than 14 dBm. It achieves an adjacent-channel leakage ratio (ACLR) of -52 dBc and an error vector magnitude (EVM) of -40 dB for a 20-MHz 256-QAM signal at 2.4 GHz. With a 320-MHz 256-QAM signal, the measured ACLR and EVM performances are better than -43 dBc and -32 dB at 2.4 GHz, respectively, without using any digital pre-distortion., Electronics

A high-power fully-digital Doherty transmitter (DDTX) is proposed. It features two segmented LDMOS output switch banks implemented in a custom V T -down-shifted LDMOS technology. A 40 nm CMOS controller digitally activates the individual LDMOS gate segments of the output stage at RF speed. An inverted Doherty power combiner is proposed that features non-short circuited 2 nd harmonic conditions for the main and peak switch banks to boost the RF bandwidth. To guarantee smooth output power and efficiency vs. frequency, a 2 nd harmonic trap is introduced in the power combiner, yielding an RF bandwidth of > 400 MHz. The realized demonstrator can achieve over 39 W peak output power. Its highest drain and system efficiencies, respectively 60 % and 57 %, were found at 34.2 W of output power, while in power back-off its peak drain and system efficiencies are 52 % and 48 % respectively. Over a 25 dB output range, the system efficiency is within 4 percent points of the drain efficiency., Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics

Continuous Class F (CCF) power amplifiers (PAs) overcome Class-F PA's disadvantage of narrow bandwidth by relaxing the short-circuit requirement at the 2nd harmonic while still maintaining 90.7% peak efficiency over the band of interest. This paper proposes four different CCF output networks, with their design procedure, suitable for on-chip implementation in the 2.1-2.7GHz band. The output stage with 2nd harmonic trap and no RF choke is favoured due to its flat real impedance, low fundamental reactance, and compact layout. Using a 40nm CMOS process, a passive efficiency of 68% at 2.4GHz for this structure is in reach., Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public., Electronics

We present a wideband, 12-bit four-way Doherty Cartesian digital transmitter (DTX) featuring an innovative 50%-LO signed I/Q interleaved up-conversion technique that enables close to perfect orthogonal I/Q summation. The DTX incorporates a compact four-way lumped-element Doherty power combining network to enhance its average efficiency at deep power back-off (DPBO). It comprises a signed second-order hold (SOH) interpolation filter to suppress the sampling spectral replicas significantly. The proposed DTX is realized in a 40-nm bulk CMOS and delivers a peak output power of 27.54 dBm with drain and system efficiencies of 46.35% and 30.77%, respectively, at 5.3 GHz. At 12 dB DPBO, the realized DTX demonstrates a drain efficiency (DE) of 41.74%-39.27% in a 5.2-5.5 GHz band, respectively. Its intrinsic I/Q image, LO leakage, and C-IMD3/H 3BB for a 200 MHz tone spacing over a 4.8-6.2 GHz band are-64,-65, and-69 dBc, respectively, without calibration. Applying a simple memoryless 2× 1-D digital pre-distortion, its error vector magnitude and adjacent channel leakage ratio are lower than-31 dB and-39 dBc, respectively, for a six-carrier '40 MHz 256-QAM OFDM' signal with 18 dBm average output power and a 41% average DE. The signed SOH functionality is verified employing a four-carrier '80 MHz 512-QAM OFDM' signal with spectral purity of better than-35 dBc, while its baseband sampling frequency is 675 MHz., Accepted author manuscript, Electronics

This article presents a wideband energy-efficient transmitter (TX) for 5G mm-wave phased-array systems. It features an advanced double-quadrature direct upconverter (DQ-DUC) to improve its in-band linearity and spectral purity. The proposed TX architecture incorporates an efficiency-enhanced balanced power amplifier (EEBPA) that mitigates VSWR fluctuations in phased-array systems while enhancing efficiency at power back-off (PBO). The EEBPA comprises two identical series-Doherty power amplifiers (PAs) combined through a quadrature hybrid coupler forming a balanced PA. The proposed DQ-DUC consists of a pair of I/Q modulators and the proposed EEBPA's quadrature combiner to further suppress the I/Q image. To verify the proposed techniques, a 40-nm CMOS prototype is implemented. It delivers 20 dBm P 1 dB with 40%/31% drain efficiency at P 1 dB/6-dB PBO. The measured TX output reflection coefficient is better than-18 dB over a 22.5-30-GHz band. Its intrinsic LO feedthrough and image-rejection ratio for a 100-MHz tone spacing over a 24-30-GHz band are better than-45 dBc/50 dB, respectively, without calibration. The average error vector magnitude (EVM) is better than-27.1 dB without digital pre-distortion for an eight-carrier '100-MHz 64-QAM OFDM' signal with an 800-MHz aggregated bandwidth while generating an average output power of 8.4 dBm with 10.8% drain efficiency. Its maximum forward-power/EVM deviations are better than 0.3/1.65 dB, respectively, for a '100-MHz 64-QAM' signal under a voltage standing wave ratio of 3., Accepted Author Manuscript, Electronics

We present a wireline transmitter (TX) for re-configurable chip-to-chip links. The proposed design features a frequency-adaptive clock chain, a fast 16:1 clocked-CMOS multiplexer (C2MOS MUX) tree, and a full-rate synchronous current-mode logic (CML) clock driver. A prototype realized in 40-nm CMOS accomplishes a wide 0.1-to-11 Gb/s operation range (fmax/fmin = 110×). At 11 Gb/s, the prototype achieves 3.98 pJ/bit for a bit error rate (BER) < 10-12 with a 60.9-ps eye width., Accepted author manuscript, Electronics

The introduction of the fifth-generation (5G) New Radio (NR) standard has imposed several challenges in the design of sub-6GHz receivers (RX). Firstly, the maximum channel bandwidth(2BW) increases to 100MHz, while a -15dBm continuous-wave (CW) blocker can be located only \Delta f=85MHz away from the desired band edge. Such a small \Delta f/BW(\sim2) places a stringent linearity requirement on an RX, thus demanding the use of higher-order filtering. Secondly, in-band (IB) linearity also becomes critical, since the band of interest may contain many signals resulting from carrier aggregation and digital beamforming 0peration. Finally, a sub-3dB noise Figure (NF) is required to achieve the highest possible link budget, which allows to maximize the spectral efficiency and data rate., Electronics

This article presents the first application of a digital-intensive intrinsically linear digitally controlled class-E technique in a Doherty configuration. By careful nonlinear segmentation and multiphase RF-clocking along with overdrive-voltage control and automatic duty-cycle correction, it is shown that even the nonlinearities related to Doherty operation can be fully handled by the underlying design such that digital predistorion (DPD) can be, in principle, omitted. The nonlinearity behavior of the whole digital Doherty power amplifier (PA) is analyzed, and closed-form equations are given to predict the AM-AM and AM-phase modulation (PM) curves. In addition, time/phase mismatch between the peak and main branches and the AM and PM signals is accurately compensated. In order to achieve the maximum intrinsic linearity, two separate chips with the same architecture, but different design parameters, are fabricated as the main and peak amplifiers in 40-nm bulk CMOS. To achieve a large RF bandwidth and high passive combiner efficiency, a differential low-loss, wideband Marchand balun-based Doherty power combiner, implemented using reentrant coupled lines with independent second-harmonic control is proposed, and together with the matching network is fabricated on a two-layer PCB. The measured peak/6-dB power backoff P OUT, drain efficiency/power-added efficiency at 2.4 GHz are 17.5 dBm/12.2 dBm, 57%/52% and 36%/25% with VDD main/peak = 0.6 V/0.7 V. Measured results without using DPD show -41-dBc adjacent channel power ratio (ACPR) and -36-dB error vector magnitude (EVM) for a 16-MHz OFDM signal at 2.5 GHz. By using DPD, the measured ACPR and EVM of a 16-MHz/32-MHz OFDM signals are -52 dBc/-48 dBc and -50 dB/-48 dB, respectively., Accepted author manuscript, Electronics

A 0.14-μ m CMOS 2-D permittivity imaging matrix prototype operating at microwave frequencies is presented. It comprises 25 permittivity-sensing pixels, each consisting of a sensing patch connected to a dedicated RF bridge. A trans-conduct-ance stage converts the imbalance voltage to a current signal, subsequently down-converted to an intermediate frequency and sampled. The implemented sensor matrix shows precise permittivity measurements over a range of 0.1-10 GHz, and successfully demonstrates permittivity contrast with a resolution of 0.1 - 2.3 from 0.1 to 10 GHz when the matrix is interfaced with various dielectrics. Owing to the matrix implementation a sub-mm, permittivity discontinuity is easily resolved by the presented sensor device., Electronics, Electronic Instrumentation

Packaged integrated low-pass quasi-load insensitive (QLI) class-E matching is proposed for the realization of energy-efficient wideband Doherty and outphasing transmitters. In view of this, a dedicated QLI class-E harmonic matching technique, suitable for in-package integration has been developed, optimized, and evaluated. As proof of concept, very compact, as well as easy to assemble, dual-input load-modulating transmitters have been realized. In this paper, we focus on a QLI class-E matched wideband Doherty that provides 71% peak efficiency (± 3%) at 48-dBm saturated output power and 49% (± 7%) efficiency at 6-dB power backoff, over a 1200-MHz frequency span (1.4-2.6 GHz), yielding 60% fractional bandwidth (BW). When tested with single-carrier long-term evolution (LTE) signals, having a 7-dB peak-to-average ratio, average efficiency remains close to 49% (± 3%) for the entire 60% fractional BW. The realized demonstrator shows excellent linearizability with adjacent channel power ratio and normalized mean square error levels below -50 dBc and -36 dB, respectively, even when operated in simultaneous dual-band LTE operation., Accepted Author Manuscript, Electronics

A compact sensing pixel for the determination of the localized complex permittivity at microwave frequencies is proposed. Implemented in the 40-nm CMOS, the architecture comprises a square patch, interfaced to the material-under-test sample, that provides permittivity-dependent admittance. The patch admittance is read out by embedding the patch in a double-balanced, RF-driven Wheatstone bridge. The bridge is cascaded by a linear, low-intermediate frequency switching downconversion mixer, and is driven by a square wave that allows simultaneous characterization of multiple harmonics, thus increasing measurement speed and extending the frequency range of operation. In order to allow complex permittivity measurement, a calibration procedure has been developed for the sensor. Measurement results of liquids show good agreement with theoretical values, and the measured relative permittivity resolution is better than 0.3 over a 0.1-10-GHz range. The proposed implementation features a measurement speed of 1 ms and occupies an active area of 0.15x0.3 mm², allowing for future compact arrays of multiple sensors that facilitate 2-D dielectric imaging based on permittivity contrast., Accepted Author Manuscript, Electronics, Electronic Instrumentation

This paper presents a wideband 2 13-bit in-phase/quadrature-phase (I/Q) RF digital-to-analog converter-based all-digital modulator realized in 65-nm CMOS. The isolation between I and Q paths is guaranteed employing 25% duty-cycle differential quadrature clocks. With a 1.3-V supply and an on-chip power combiner, the digital I/Q transmitter provides more than 21-dBm RF output power within a frequency range of 1.36–2.51 GHz. The peak RF output power, overall system, and drain efficiencies of the modulator are 22.8 dBm, 34%, and 42%, respectively. The measured static noise floor is below 160 dBc/Hz. The digital I/Q RF modulator demonstrates an IQ image rejection and local oscillator leakage of 65 and 68 dBc, respectively. It could be linearized using either of the two digital predistortion (DPD) approaches: a memoryless polynomial or a lookup table. Its linearity is examined using single-carrier 4/16/64/256/1024 quadrature amplitude modulation (QAM), as well as multi-carrier 256-QAM orthogonal frequency-division multiplexing baseband signals while their related modulation bandwidth can be as high as 154 MHz. Employing DPD improves the third-order intermodulation product (IM3) by more than 25 dB, while the measured error vector magnitude for a “single-carrier 22-MHz 64-QAM” signal is better than 28 dB., Microelectronics & Computer Engineering, Electrical Engineering, Mathematics and Computer Science

The design concept of passive and active reconfigurable reflectarray antennas has been proposed and tested. The antenna elements in the array are identical hollowed patches. In the first phase of study the slots are loaded with a SMD capacitor to set the required phase shift needed for array implementation. Simulations show promising results. Mounting a SMD capacitor in such a configuration can be considered as the first step in using capacitive loading on a slotted patch for active microstrip reflectarrays. It is shown that by adjusting the capacitance values it is possible to scan the beam. In the second phase, the patch elements are loaded with active varactor-diode device which its reflected phase can be varied. This phase alteration is based on the variation of the diode capacitance which can be achieved by varying the biasing voltage of the active varactor device. In latter approach by activating these varactor devices, the phase of each antenna element in the array configuration can be adopted dynamically and consequently, its beam direction can be reconfigured. The reflectarrays incorporating passive and active elements have been built and tested at 7.0 GHz and 6.0GHz, respectively. The performance of the proposed reconfigurable antennas is excellent, and there is good agreement between the theoretical and measurement results which pioneers design of arbitrarily reconfigurable antennas., Design Engineering, Industrial Design Engineering

Microelectronics, Electrical Engineering, Mathematics and Computer Science

This paper reviews special RF/microwave silicon device implementations in a process that allows two-sided contacting of the devices: the back-wafer contacted silicon-on-glass (SOG) substrate-transfer technology (STT) developed at DIMES. In this technology, metal transmission lines can be placed on the low-loss glass substrate, while the resistive/capacitive parasitics of the silicon devices can be minimized by a direct two-sided contacting. Focus is placed here on the improved device performance that can be achieved. In particular, high-quality SOG varactors have been developed and an overview is given of a number of innovative highly-linear circuit configurations that have successfully made use of the special device properties. A high flexibility in device design is achieved by two-sided contacting because it eliminates the need for buried layers. This aspect has enabled the implementation of varactors with special Ndx -2 doping profiles and a straightforward integration of complementary bipolar devices. For the latter, the integration of AlN heatspreaders has been essential for achieving effective circuit cooling. Moreover, the use of Schottky collector contacts is highlighted also with respect to the potential benefits for the speed of SiGe heterojunction bipolar transistors (HBTs)., Microelectronics & Computer Engineering, Electrical Engineering, Mathematics and Computer Science

Measurement arrangement and method for active load pull measurements of a device under test (1). A wideband analog-to-digital conversion block (3) is provided for obtaining measurement data. First and second injection signal generators (7, 8) are connected to a source side and a load side of the device under test (1). This set up allows to create predetermined reflection coefficients at reference planes of the device under test (1). Injection signal parameters as determined are converted into the injection signals at the source and load side by digital-to-analog conversion. The wideband analog-to-digital conversion block (3) is further arranged for analog-to-digital conversion of the intermediate frequency signals to obtain the actual measured reflection coefficient versus frequency functions with a first frequency resolution. The first frequency resolution applied in the analog-to-digital conversion is equal to or better than a second frequency resolution applied in the digital-to-analog conversion., Microelectronics & Computer Engineering, Electrical Engineering, Mathematics and Computer Science

A 90-W peak-power 2.14-GHz improved GaN outphasing amplifier with 50.5% average efficiency for wideband code division multiple access (W-CDMA) signals is presented. Independent control of the branch amplifiers by two in-phase/quadrature modulators enables optimum outphasing and input power leveling, yielding significant improvements in gain, efficiency, and linearity. In deep-power backoff operation, the outphasing angle of the branch amplifiers is kept constant below a certain power level. This results in class-B operation for the very low output power levels, yielding less reactive loading of the output stages, and therefore, improved efficiency in power backoff operation compared to the classical outphasing amplifiers. Based on these principles, the optimum design parameters and input signal conditioning are discussed. The resulting theoretical maximum achievable average efficiency for W-CDMA signals is presented. Experimental results support the foregoing theory and show high efficiency over a large bandwidth, while meeting the linearity specifications using low-cost low-complexity memoryless pre-distortion. These properties make this amplifier concept an interesting candidate for future multiband base-station implementations., Microelectronics & Computer Engineering, Electrical Engineering, Mathematics and Computer Science

A new wideband open-loop active harmonic load–pull measurement approach is presented. The proposed method is based on wideband data-acquisition and wideband signal-injection of the incident and device generated power waves at the frequencies of interest. The system provides full, user defined, in-band control of the source and load reflection coefficients presented to the device-under-test at baseband, fundamental and harmonic frequencies. The system capability to completely eliminate electrical delay allows to mimic realistic matching networks using their measured or simulated frequency response. This feature enables active devices to be evaluated for their actual in-circuit behavior, even on wafer. Moreover the proposed setup provides the unique feature of handling realistic wideband communication signals like multicarrier wideband code division multiple access (W-CDMA), making the setup perfectly suited for studying device performance in terms of efficiency, linearity and memory effects. In this work we describe the hardware and signal conditioning of the proposed setup. The high dynamic range, bandwidth and measurement speed of the system, together with its capability to engineer the large-signal operation of an active device, are demonstrated by measuring the improved RF performance of a multicarrier W-CDMA driven laterally diffused metal–oxide–semiconductor device when the electrical delay in the setup is canceled., Microelectronics & Computer Engineering, Electrical Engineering, Mathematics and Computer Science

Delft Institute of Microsystems and Nanoelectronics, Electrical Engineering, Mathematics and Computer Science

A three-way Doherty 100-W GaN base-station power amplifier at 2.14 GHz is presented. Simple, but accurate design equations for the output power combiner of the amplifier are introduced. Mixed-signal techniques are utilized for uncompromised control of the amplifier stages to optimize efficiency, as well as linearity. The combination of the above techniques resulted in an unprecedented high efficiency over a 12-dB power backoff range, facilitating a record high power-added efficiency for a wideband code division multiple access test signal with high crest factor, while meeting all the spectral requirements for Universal Mobile Telecommunications System base stations., Delft Institute of Microsystems and Nanoelectronics, Electrical Engineering, Mathematics and Computer Science