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Purpose - The purpose of this paper is to introduce several synchronization test methods of Network-on-Chip (NoC) at multi-clock domains by digital logic circuits. Design/methodology/approach - First, the authors gave the structure of NoC, the test methods for NoC in multi-clock domains, including Built-in Self Test (BIST) structure and the architecture of embedded core test. Then the authors approached four different synchronization structures: two-level trigger, two kinds of lock methods, toggle and pulse synchronization methods. Based on the NoC work conditions, the authors built the experiment structures of different methods, and obtained the experiment results at high frequencies. Findings - From the experiments at high frequency, it can be seen that the methods of toggle and the pulse methods are prone to failed synchronization. Therefore, the lock method is more appropriate for NoC under multiple clock domains. Originality/value - In this paper, several synchronization test methods of NoC at multi-clock domains are discussed and compared, and the best one determined. [ABSTRACT FROM AUTHOR]

Purpose – The purpose of this paper is to design an open architecture of an interconnected communication system (ICS) for multi-level electric power control centers (EPCC) based on Tele-control Application Service Element (TASE.2), which possesses specialties of high performances, robustness, cost-efficiency, quick-restoration, and easy-maintenance. Design/methodology/approach – Based on the hierarchy and structure of TASE.2, the overall architecture of the ICS for multi-level EPCC is put forward at first. As the key devices in the system, the structures of the communication gateway (CG) and common interface are designed. Then, the logical procession flows in CG and the con modes, for both CG and IC are analyzed in detail. The web-based software configuration of remote maintenance and fault diagnosis is discussed conceptually. Findings – As a standardized, well-developed, and efficient protocol, TASE.2 is considered to be the most suitable protocol to support the ICS for multi-level EPCC. Research limitations/implications – The performance of the ICS needs to be further simulated. Practical implications – Practical architecture for ICS for multi-level EPCC with robustness and cost-efficient specialty is designed in principle, which is very useful for manufacturers to develop pilot devices or even products. Originality/value – This paper proposes a new ICS scheme for multi-level EPCC based on TASE.2 is proposed. [ABSTRACT FROM AUTHOR]