29 results on '"Zivojnovic, V."'
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2. Cycle and phase accurate DSP modeling and integration for HW/SW co-verification.
3. LISA-machine description language for cycle-accurate models of programmable DSP architectures.
4. Compiled simulation of programmable DSP architectures.
5. LISA-machine description language and generic machine model for HW/SW co-design.
6. Multiprocessor scheduling with a priori node assignment.
7. On core and more: a design perspective for systems-on-a-chip.
8. Compiled HW/SW co-simulation.
9. Minimum Fisher information of moment-constrained distributions with application to robust blind identification
10. Minimum Fisher information spectral analysis
11. Compiled HW/SW co-simulation
12. Modulo-addressing utilization in automatic software synthesis for digital signal processors
13. An upper bound of the throughput of multirate multiprocessor schedules
14. On retiming of multirate DSP algorithms
15. On core and more: a design perspective for systems-on-a-chip
16. LISA-machine description language for cycle-accurate models of programmable DSP architectures
17. System-level modeling of DSP and embedded processors
18. LISA-machine description language and generic machine model for HW/SW co-design
19. System-level modeling of DSP and embedded processors.
20. Retiming of DSP programs for optimum vectorization.
21. Minimum Fisher information spectral analysis.
22. Modulo-addressing utilization in automatic software synthesis for digital signal processors.
23. An upper bound of the throughput of multirate multiprocessor schedules.
24. Hierarchization of a priori defined dataflow subgraphs.
25. On retiming of multirate DSP algorithms.
26. Design of optimum interpolation filters for digital demodulators.
27. A robust accuracy improvement method for blind identification using higher order statistics.
28. High performance DSP software using data-flow graph transformations.
29. DSP processor/compiler co-design.
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