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With the extreme scaling, active devices in both CMOS and BiCMOS technologies have reached outstanding ft/fmax, enabling an ever-increasing number of existing and emerging applications in the microwave and millimeter wave (mm-wave) frequency range. The increase in transistors ft/fmax has been so much significant that the performance of microwave and mm-wave ICs are limited mainly by losses in passive devices. In this paper, we address a discussion on qualitative and quantitative aspects that may help to further unveil the impact of such losses on the overall circuit performance and stimulate the adoption of effective loss-aware design methodologies. As example, we report the results related to the design of low power mm-wave low noise amplifiers (LNAs). Our results show how, in low power regime, the performances of mm-wave LNAs are dominated by losses in passive components. We also show how loss-aware design methodologies can mitigate the performance degradation due to passives, resulting as an important tool to get the full potential out of the active devices available today., Comment: The final version of this draft has been appearing in the Proceedings of ISC 2019 available on IEEE Xplore Digital Library

This paper investigates the implementation of microwave and mm-wave integrated circuits for control and readout of electron/hole spin qubits, as elementary building blocks for future emerging quantum computing technologies. In particular, it summarizes the most relevant readout and control techniques of electron/hole spin qubits, addresses the feasibility and reports some preliminary simulation results of two blocks: transimpedance amplifier (TIA) and pulse generator (PG). The TIA exhibits a transimpedance gain of 108.5 dB Ohm over a -3dB bandwidth of 18 GHz, with input-referred noise current spectral density of 0.89 pA/root(Hz) at 10 GHz. The PG provides a mm-wave sinusoidal pulse with a minimum duration time of 20 ps., Comment: The final version of this draft has been appearing in the Proceedings of ISCAS 2020 available on IEEE Explore Digital Library

Next-generation (5G/6G) wireless systems demand low-power mm-wave phased-array ICs. Variable-gain LNAs (VGLNAs) are key building blocks enabling hardware complexity reduction, performance enhancement and functionality extension. This paper reports a performance benchmarking of two low-power 30GHz VG-LNAs for phased-array ICs, which provide a 7.5dB gain control for 18dB Taylor taper in a 30GHz 8x8 antenna array, for a comprehensive validation of the new class of VGLNAs and its design methodology. In particular, this paper reports a second and implementation (VG-LNA2) with a reduced number (four) of gain-control back-gate voltages and super-low-Vt MOSFETs, with respect to the previous first implementation (VG-LNA1) with six gain-control back-gate voltages and regular- Vt MOSFETs, both in the same 22nm FDSOI CMOS technology. The results show that VG-LNA2 exhibits performance comparable to those of VG-LNA1, with a slightly lower power consumption. Overall, the performance benchmarking shows that the design methodology adopted for the new class of VG-LNAs leads to record low-power consumption and small form factor solutions reaching the targeted performances, regardless of the arrangements of the back-gate voltages for gain control and transistor sets, resulting in a comprehensive validation of the innovative design features and effective design methodology., Comment: The final version of this draft will be appearing in the Proceedings of DTTIS 2024 available on IEEE Xplore Digital Library

This paper reports an inductorless transimpedance amplifier (TIA) with very compact size and adequate performance for spin qubit readout operations in monolithic quantum processors. The TIA has been designed and fabricated in a 22nm FDSOI CMOS foundry technology commercially available. The measurement results show a transimpedance gain of 103 dB{\Omega} with a bandwidth of 13 GHz, at room temperature, and it is expected to exhibit slightly superior performance at cryogenic temperatures. The power consumption amounts to 4.1 mW. The core area amount to 0.00025 mm2, i.e., about two orders of magnitude smaller with respect to the prior-art works, and approaching the qubit size, which makes the inductorless TIA a compact enabling solution for monolithic quantum processors., Comment: To be published in the proceedings of the IEEE ICECS 2023