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Data traffic keeps increasing dramatically in the connected world and it pushes hard on evolution of IO technology. As technology progress, a simple and high-speed unified interconnect becomes practical to support many different protocols. Light Peak (LPK) is a high-bandwidth, inexpensive optical interconnect technology developed by Intel for this purpose. Also, to meet versatile and ever changing I/O needs, an adaptive IOH (I/O Hub) architecture could provide satisfying flexibility. In this paper, we present a high bandwidth and flexible IOH architecture for embedded system that is implemented on FPGA. The platform has 2x 10Gbps optical LPK links, and several SATA, Ethernet and Display Port interfaces. In addition to hardware, we present a software stack framework that provides a unified interface for protocols mapping, replacing numerous individual hardware controller, by utilizing LPK's versatile host controller. Thus it reduces the cost and development effort, and enhances the IOH flexibility. We also describe a configurable hardware protocol adapter in device side, which can be directly connected to any device. IO meter and Iperf show performance of SATA, Ethernet on this FPGA based IOH is competitive with the native ones.

This paper introduces an FPGA-based emulation platform for optical-enabled computer system researches. As electrical links are reaching their physical limits, optical technologies begin increasingly to play a role in computer systems by enabling high speed IO, optical memory extension and system bus links. With its excellent latency, bandwidth, power and scalability performance, optical links will move steadily closer to the processor in the future. New design challenges and tradeoffs must be considered at the system level to make a balanced and efficient system from both power and cost perspectives. With an IO-centric research methodology in mind, we try to explore the broad design space of optical-enabled computer systems by implementing an FPGA-based emulation platform as the research vehicle. On this platform, high speed IO device is connected to an FPGA-based IO controller through optical fiber and the IO controller talks to the FPGA-based synthesizable processor core via PCIe link. With the in-field-configuration characteristic of FPGA, it gives us the freedom to modify both the CPU part and the IO part of the emulated system. The first system implementation is up and running with the an example application at this stage.