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Despite the indispensable role of traditional electronic computers in modern society, their limitations in parallel processing capabilities, bit-width constraints, and processor bit-width are becoming increasingly apparent, especially when handling large-scale datasets and complex computational tasks. Although hardware technology and algorithm optimization continue to advance, the arithmetic units of traditional computers—adders—remain constrained by carry delay and bit-width limitations. This bottleneck is particularly pronounced in multiplication operations, mainly when adders are used for partial product accumulation. However, since 2018, the emergence of a new type of Reconfigurable Four-Valued Logic Electronic Processor (RFLEP) has provided a potential solution to these traditional limitations. With its large processor bit-width, flexible bit grouping capabilities, and dynamic hardware function reconfiguration features, this processor has brought revolutionary changes to the field of computing. In this context, this paper proposes and implements a Reconfigurable Four-Valued Logic Multiplication Routine (RFLMR) tailored explicitly for the RFLEP. The RFLMR utilizes the Modified Signed-Digit (MSD) representation method in multi-valued logic combined with the M transformation in four-valued logic to generate partial products. These partial products are then efficiently summed in parallel using the JW-MSD parallel adder, achieving the rapid execution of multiplication operations. Experimental results demonstrate that the multiplication routine based on the RFLEP performs multiplication operations accurately and meets theoretical expectations regarding implementation efficiency and performance. This research not only provides new ideas for developing next-generation high-performance computing systems but also paves the way for exploring more efficient and powerful computing models, heralding a profound transformation in future computing technology. [ABSTRACT FROM AUTHOR]

In view of problem of time-consuming and subjective dependence of traditional ontology construction method, an ontology construction method of coal mining face based on formal concept analysis was proposed. The method can discover concepts implied in domain data and relationship between the concepts effectively, use concept lattice to visualize ontology and add new information to ontology automatically, and realize semi-automatically update of ontology. Experiment proved effectiveness of the proposed method.

Because meaning is both the common outcome and the typical goal of language processing, including reading, semantic processes have received a privileged position, especially in cognitive science accounts that emphasize semantic, goal driven components in language. Even in accounts of written word identification, a "low-level" process, it is typical to assume that semantic outputs are achieved with optional contributions of phonology. Our goal here is to present evidence for an alternative perspective, one that gives phonology a central rather than a peripheral, optional role in word identification. W e first briefly discuss a writing system comparison that is important to this perspective. W e then summarize recent published and unpublished research that gives definition to our conclusion that phonology is a central and universal component of word reading.