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Space vector modulation (SVM) is a mature modulation scheme, which is widely used for voltage sourced inverters. In this paper, a flexible online SVM scheme is proposed for a cascaded H-bridge multilevel inverter (CHMI) under short-circuit and open-circuit switch as well as cell failure conditions. The proposed scheme directly calculates all the active redundant switching states and the dwelling duty cycles of the three space vectors enclosing the reference vector for a CHMI such that balanced line-to-line voltages and currents under failure conditions are generated. Accordingly, the resultant switching sequences are determined to meet any specific requirement, e.g., even-order harmonics elimination and minimization of switching losses. Furthermore, in order to reduce voltage stress on the semiconductors under short- and open-circuit switch conditions, an equal power distribution criterion is introduced. The proposed SVM scheme is fast and independent of the number of levels. Experimental results are presented to demonstrate performance and effectiveness of the proposed scheme.

The constant kernel width of generalized maximum correntropy criteria (GMCC) has arisen that the steady-state error and convergence speed can be mutually exclusive. To solve this problem, this paper proposes the variable kernel width (VKW) GMCC algorithm. Actually, due to the censored problem, the output data value beyond the limit of the recording device can not be well observed. In this case, we further developed a variable kernel width GMCC algorithm based on censored regression (CRVKWGMCC). Simulation results show that the proposed CR-VKWGMCC algorithm has excellent performance in both Gaussian and non Gaussian noise.

The random Fourier filter-based filtered-x least mean square (RF-FxLMS) algorithm has been proposed for the nonlinear active noise control (NANC) system to reduce the computational burden of the kernel filter. However, the RF-FxLMS algorithm markedly fluctuates when dealing with impulsive noise. In addition, the computing cost for the RF-FxLMS algorithm is still pricey in practice. In this work, a random Fourier filter based filtered-x generalized hyperbolic secant function (RF-FxGHSF) algorithm is presented to deal with impulsive noise. In virtue of the bilinear scheme, a cascaded random Fourier filter model is designed for concise computations, and the cascaded RF-FxGHSF (CRF-FxGHSF) algorithm is derived. Moreover, the steady-state convergence conditions are analyzed. The calculation complexity of the proposed algorithms is compared, and experiments emphatically analyze the principle for the presented model. Numerical simulations with-stable noise and real noise carried out in different nonlinear path scenarios verify the convergence ability of proposed algorithms. Index TermsKernel filter; random Fourier filter; nonlinear active noise control; heavy tailed non-Gaussian noise; generalized hyperbolic secant distribution.

A single-phase isolated ac–dc–dc converter with low total harmonic distortion and high power factor usually suffers from a significant ripple power at double line frequency. The inherent ripple power brings a significant low-frequency voltage ripple on the dc-link capacitor. To reduce the voltage ripple, bulky electrolytic capacitors and hardware low-pass filter are widely adopted. However, the converter becomes bulky because of large capacitor. In order to reduce the dc-link capacitance, optimal control strategies are proposed for ac–dc and dc–dc converter, respectively, in this article. First, the notch filter with current disturbance feedforward strategy (NF-CDFS) are proposed to minimize input harmonic current of ac–dc converter. Second, the feedback linearization with voltage disturbance feedforward strategy (FLVDFS) is designed to suppress the output voltage ripple of dc–dc converter based on generalized state space averaging model. With the proposed NF-CDFS plus FLVDFS control strategy, low input harmonic current and low output voltage ripple are achieved. In addition, more than about 85% of dc-link capacitance is reduced compared to conventional methods.

The cascaded H-bridge multilevel converter (CHMC) is a promising topology for medium- and high-voltage applications, as it features modularity and scalability. In this letter, a simplified space vector modulation (SVM)-based reconfiguration strategy is proposed to enable fault-tolerant operation of a CHMC. Assuming that the faulty power cells are bypassed, the proposed strategy decomposes the asymmetric CHMC into two parts, i.e., healthy part with healthy modules and unhealthy part with faulty modules. Consequently, the basic reference vector (BRV) and the remainder reference vector (RRV) are generated from the reference vector (RV) to achieve balanced line-to-line voltages and currents with optimized harmonic performance. The proposed strategy can be easily implemented online. Performance and effectiveness of the proposed strategy is verified by experimental results.

The nearest level modulation (NLM)-based space vector pulsewidth modulation (SVPWM) algorithms have attracted a great deal of interest since they can provide various degrees of freedom, i.e., optimized switching sequences and adjustable duty cycles. This article proposes a simplified three-dimensional (3-D) NLM-based SVPWM algorithm in a 3-D coordinate system. Compared with the generalized two-dimensional (2-D) NLM-based SVPWM schemes, the proposed method not only provides identical degrees of freedom to optimize switching patterns and obtain adjustable duty cycles, but also presents better digital implementation and lower hardware occupancy to achieve the real-time PWM generation. In addition, based on the NLM-based principle, a method of addressing the issue of unbalanced voltages in a three-phase 3-level neutral point clamped cascaded multilevel converter (3LNPC-CMC) is introduced. The presented method possesses the optimized voltage-balancing capacity and equalizes the unbalanced inner cell and mutual cell voltages in the 3LNPC-CMC with minimum number switching transition. Finally, the whole proposed process is verified by simulation and experimental results.

High speed and heavy loads have become more prevalent in the traction power supply system recently. To ensure system operating stability, better power quality, and sufficient power capacity, improvements are needed over the conventional traction system. Inspired by the concept of a microgrid (MG), an AC co-phase traction MG system was proposed. Substations were connected to the traction grid as distributed generators operate in islanded mode. Droop control was adopted as the primary control to stabilize the system&rsquo, s operating frequency and voltage. Considering the operating features of the substation and locomotive load, a de-centralized secondary control strategy was proposed for AC co-phase traction MG system operation with enhanced resiliency. The proposed control strategy could increase system stability and prevent circulation currents between substations. Moreover, the proposed de-centralized coordination between substations does not rely on communication, which promotes the system&rsquo, s &ldquo, plug-and-play&rdquo, functionality. Stability analysis was undertaken and the proposed controller was proved to be exponentially stable. The dynamic response of the proposed controller was validated using comprehensive case studies in MATLAB/Simulink.

The power electronic transformer (PET) is a module-cascaded converter with high-frequency-link technology to realize high-power conversion. A typical structure of PET contains a three-phase cascaded H-bridge rectifier in the first stage and several dual active full-bridge (DAB) dc-dc converters in the second stage. Due to dc-link voltage and power unbalancing in the cascaded modules in the first stage, the system may have overvoltage or overcurrent issues. In this paper, based on star-connected cascaded H-bridge (CHB), a zero-sequence voltage injection method is proposed based on the three-phase d-q model to balance dc-link voltage in mutual phase while a hybrid modulation method is proposed to realize dc-link voltage balancing in inner phase. Besides the function of the dc-link voltage balancing, the proposed method is also capable of suppressing the negative sequence and zero sequence components in the system and reducing switching losses.

The isolated bidirectional resonant converter is widely applied for renewable energy battery charger because of its high operating frequency and power density. But traditional LLC converter has many problems in reverse working mode. This paper introduces the CLLC resonant converter into the battery charging and discharging system. The circuit principle and the equivalent model of CLLC resonant converter is analyzed and constructed by FHA method. The CLLC battery charger control strategy is realized by FPGA. Based on the theoretical analysis, the resonant network parameters are designed. Finally, the experimental hardware platform of CLLC resonant converter is designed to verify the feasibility of the overall system.

As a module of power electronic transformer (PET), single-phase isolated ac-dc-dc converter is popular in high-power applications. However, there is inherent instantaneous power difference between ac input and dc output, which leads to a significant low-frequency voltage ripple on the dc-link capacitor. It will affect the performance of dual active bridge (DAB), such as the range of zero voltage switch (ZVS) and output voltage ripple. So, the relationship between ZVS range of DAB converter and the input voltage is deduced. According to this relationship, leakage inductance of transformer is designed to realize full power range soft switching of the back-stage DAB. To suppress output voltage ripple, a feedback linearization control strategy is proposed. Finally, the rationality of the designed transformer leakage inductor and effectiveness of the proposed control strategy are verified by simulation. The simulation results show that the dc-link voltage ripple does not significantly increase the peak and RMS current of transformer, and the designed leakage inductor can realize ZVS in full power range of when the dc-link capacitor contains ripple. Moreover, the proposed control strategy can suppress the dc-link ripple transferring to the output.

In order to reduce the number of switches in the three-phase current compensation converter, a compensation scheme of two single-phase half-bridge back-to-back converters is proposed in this paper. In the traditional control, the active current is imbalanced and the reactive power cannot be fully compensated because the angle difference between line voltage and phase current is not considered. In order to solve this problem, a two-phase cross-decoupling control strategy of active and reactive currents is proposed. Firstly, the relation between active and reactive reference compensation currents and load currents is deduced based on the phase angle difference. According to this relation, the active and reactive currents of the single-phase converter are controlled respectively. To suppress the influence of load harmonic current on grid currents, a specific order harmonic control method is proposed. The simulation results show that compared with the traditional control strategy, the proposed control strategy can reduce the imbalance of three-phase current from 25% to 0.5%, increase the PF from 0.962 to 0.999, and compensate the grid harmonic currents.

The Static Synchronous Compensator (STATCOM) is a crucial component in the Flexible AC Transmission system (FACTS) as it acts flexibly on the reactive-load compensation and harmonic suppression. With respect to a STATCOM, the cascade H-bridge multilevel converter (CHMC) stands out and is widely used due to its flexibility and modularity. However, DC capacitor voltages imbalance among different modules of a CHMC is an inevitable and critical issue. In order to address this issue, an optimized DC capacitor voltage control strategy is proposed in this paper. The presented control strategy explores capacitor voltage charge and discharge criterions to online compare the difference between the sampled DC capacitor voltages and the average capacitor DC voltages. Subsequently, incorporated into different three-phase phase angles, proportional integral (PI) controllers are applied to finalize the DC capacitor voltage balance among different modules. In addition, an overall power control loop and a reactive power compensated loop are introduced as well to guarantee the normal operation of the STATCOM. In addition, the DC capacitor voltage balance can still be kept when the load suddenly changes, and the voltage balancing strategy can respond quickly when it is enabled. The effectiveness of the overall control strategy is verified by simulation and experimental results.

The input and output power difference of single-phase rectifier will generate the low-frequency voltage ripple on the dc-link capacitor. Since the front-end output of single-phase power electronic transformer (PET) is not connected to the load, the hardware low-pass filter can be cancelled or the dc-link capacitance can be reduced. After releasing the constraints of dc-link voltage fluctuation, the low-frequency voltage ripple will increase the input current total harmonic distortion (THD) and reduce the input power factor (PF). A specific order harmonic compensation strategy is proposed in this paper to reduce the harmonic and reactive current in the grid. Simulation and experimental results show that the proposed control strategy can significantly reduce THD and increase PF when the dc-link capacitance is reduced.

A real-time fault diagnosis method for neutral-point-clamped (NPC) active power filters (APF) is proposed. According to the different relationships between the APF’s harmonic current and reference voltage under normal condition and fault condition, the fault diagnosis algorithm can detect and locate the open-circuit faults (OCF) with no additional hardware or sensors. The selection basis of the two thresholds required by the fault diagnosis algorithm is also analyzed in the article. Fault detection can be achieved in just a few sample periods (in favorable conditions). All the signals used in this algorithm have already been employed in the APF’s controller and only addition and comparison are required in the algorithm, which is very simple. The efficiency of the proposed algorithm is verified by the simulation results.

In order to improve the steady-state performance of the dual active bridge (DAB) converter, this paper adopts the objective of minimizing the inductor root-mean-square (RMS) current to improve the converter efficiency. By elaborating an ac equivalent model, a method to simplify operation modes of the converter based on symmetric transformation is proposed, which eliminates redundant operating modes from 12 to 3. Aiming at incompletenesses of finding stationary points and Lagrange multiplier method (LMM) in minimizing the rms current, the constrained optimization problem is given, and the mathematically strict closed-form solution is derived using optimality conditions. Finally, an optimized control strategy for buck and boost operations is validated by a SiC-based small-scale prototype.

Since industrialization, the development of productivity has brought serious pollution. Since the new century, human beings attach more importance to clean energy. To mitigate the instability, energy storage components, such as batteries or ultracapacitors, are widely used in clean energy systems. Due to the present level of science and technology, energy storage devices are often used in series to meet the voltage requirements for specific applications. Nevertheless, voltage differences caused by individual characteristic differences will affect the performance of batteries. Hence, there is necessity to equalize energy storage components. What’s more, in the traditional voltage sharing circuit, with the decrease of battery voltage difference, the equalizing current will also become smaller. In some cases, that current may even be small enough to affect the normal operation of the circuit. To overcome this problem, this paper introduces a voltage equalizing circuit which can achieve a big current even when voltage difference is very close to zero. The structure of this circuit is based on half-bridge converter and multiport transformer. The formation principle of transformer secondary side voltage is analyzed in detail. According to this, transformer ratio n is redesigned to gain a proper equalizing current. A simple equalization control method is introduced. At last, the theory is verified by simulation and a 20-cell voltage sharing experiment.

Due to the different application prospects, the coils of inductive power transfer (IPT) system varies. The coils on printed circuit boards (PCB) have drawn considerable attention gradually. However, the applications mainly involve portable equipment and implantable medical devices operating at a high frequency, not fit for IPT system. In this paper, an IPT system based on PCB coils were designed. All the characteristics of single turn coils on a single-layer, multi turns coils on a single-layer and multi turns coils on multi-layers of printed spiral coils (PSCs) were analysed and calculated. The self-inductance and mutual inductance of the series windings on PSCs were modeled and calculated firstly. An equivalent circuit of coils were proposed to simplify the calculation and facilitate the analysis. Furthermore, in order to increase mutual inductance and transfer more power, the multi-layer coils connecting in series were designed for the first time and the inductance parameters can be acquired by the means of proposed method. The analyses on coils model were verified by simulations using finite element method and measuring. Finally, the coil characteristics on IPT system were verified by the circuit simulation and experiment results and the designed coils can meet the desired requirements.

Direct current voltages unbalance of respective power cells is an inherent and critical problem in a cascaded multilevel converter, which is widely used in the solid-state transformer. In this paper, an n -dimension space vector pulse width modulation is presented to address this issue in a three-level H-bridge-based cascaded multilevel converter. This algorithm utilizes the redundant switching pairs of the inner cell and the redundant vectors of mutual cells to balance capacitors’ and cells’ voltages. Meanwhile, a smooth vector transition strategy is included in this algorithm to avoid the level-skip phenomenon. The calculation processes are analyzed in one-cell, two-cells, and three-cells modes, respectively. It is simple, calculable, and flexible to extend in n -cells mode. Finally, the voltage balancing capacity of the inner cell and mutual cells with smooth level transition are verified by simulations and experiments not only at startup but also with unbalanced loads.

A phase shift carrier space vector pulse width modulation scheme based on an opposite vector voltage balancing strategy is proposed to extend the balance region of dc-link capacitor voltages for a single-phase three-level neutral point clamped cascaded rectifier (3LNPC-CR). The internal-module and mutual-module 3LNPC-CR balancing strategies are simultaneously applied to improve the voltage balancing capacity when the dc loads are unbalanced. The voltage balance boundaries of three space vector pulse width modulations using the traditional strategy, the zero vector strategy, and the opposite vector strategy are compared. The analysis results indicate that the proposed modulation algorithm maintained balanced voltages for all modules even if one load of the module was removed. Meanwhile, the equalization of the neutral point voltage for the single-phase 3LNPC-CR was also achieved. Finally, the voltage balancing capacity and rectifier performance of the proposed strategy was verified by simulations and experiments.

A specific harmonic compensation control based on the nth specific order d–q transformation in the nth synchronous coordinates is proposed in this study. The distorted load currents are transformed into the nth– dq components in the separate nth harmonic frequency channels. These components corresponding to the specific nth harmonics are individually controlled in closed-loop by the decoupling regulators, which can track the amplitude and phase angle of the specific order harmonic with zero steady-state error. Meanwhile the current references would be transformed to voltage references. Therefore, the voltage references generated by these separate harmonic control channels could be accumulated together to form the final real-time modulation voltage references to drive the voltage-source inverter including two-level and multi-level structures. The control algorithm is analysed and its parameters are designed. The three-level active power filter simulation and a small-scale prototype are established. The simulation and experimental results indicate that the harmonics can be specific eliminated and controlled. The total harmonic distortion of source currents could be reduced from 20 to 0.5% with the specific filtering of 5th, 7th, …, 31st harmonics.

The auxiliary power supply system is used to supply the power to the electric equipments, like the lighting and the heating equipments, etc and plays an important role in the normal operation of the Electric Multiple Units (EMU). As to the generalized auxiliary converters, it is difficult to achieve their lightweight design due to their properties of large capacity and volume. To address this issues, an improved auxiliary converter is proposed in this paper, which has the following advantages: 1) The proposed topology directly takes power from the DC high-voltage bus and effectively reduces the conversion order of the entire converter. 2) The charger adopts bidirectional isolated DC-DC converter to realize bidirectional energy transmission, which can overcome the disadvantage that the traditional structure cannot maintain the power supply of the AC bus when the pantograph loses power. In addition, for the DC-DC converter and inverter in this structure, the corresponding mathematical models are established and the related control strategies are applied to ensure the whole system normal operation and finally verified by simulation and experimental results.

This paper presents a simplified space vector pulse width modulation (SVPWM) method for multilevel converters based on a line voltages coordinate system. In the proposed SVPWM technique, the solution of the working space vectors and their dwelling time are simplified. In order to flexibly obtain different switching sequences, the nearest-level modulation (NLM) principle is applied. Hence, only one of three wording space vectors needs to be detected. The proposed algorithm is independent of level numbers and the generated redundant switching sequences can be used to improve the potential performance of multilevel converters. It is flexible, fast and finally verify by simulation and experimental results.

Power electronic traction transformer (PETT) is a new application direction of the traction system. The PETT consists of an ac to dc converter stage, a dual active bridge (DAB) converter stage with high-frequency transformers to accomplish the power transfer from traction network to electric locomotive. Whereas, the inherent unbalanced dc capacitor voltages in ac/dc converter and the low efficiency of power transmission through dc/dc converters will lead to the increase of switching device stress and system loss. Hence, in this paper, a voltage balancing control technique based on ac-dc converter and an optimized pulse width modulation strategy based on DAB are presented. With the proposed control and modulation methods, the unbalanced dc capacitor voltages of ac-dc converter in the system can be addressed and the power transmitting efficiency can be improved. Finally, a small-scale PETT prototype is set up to validate the performance of the proposed algorithm.

This paper presents a fault diagnosis method and system reconfiguration strategy of a three-level neutral-point-clamped cascaded inverter (3L-NPC-CI) to enhance the reliability of power supply in an electrified railway. First, the neural network (NN) is employed to perform an open-circuit fault diagnosis and identify fault switches. Then, system reconfiguration strategy is proposed to perform a single-phase 3L-NPC-CI reconfiguration. Through the analysis of the operation status of 3L-NPC, there are eight fault modes in a single-bridge arm, including the single-switch fault and double-switch fault. By the feature analysis for the output arm voltage harmonic of normal and eight fault modes, seven harmonic parameters are selected as fault feature vectors. Meanwhile, a three-layer NN is constructed, and the seven feature vectors are the input layer of the NN. By training algorithm, the fault switches location can be identified accurately about one modulation period. Then, the fault module is bypassed and the 3L-NPC-CI system is stable by reconfiguring the modulation strategy of other normal modular. Simulation and experimental results are given to validate the proposed fault diagnosis and system reconfiguration strategy. The proposed method is able to improve robustness and reliability of 3L-NPC-CI in the traction power supply system.

Aiming at the increasingly serious harmonic pollution in power system, this paper proposes an optimized harmonic suppression strategy by combining properties of the predictive current control strategy and specific order harmonic suppression algorithm based on active power filter (APF) in a medium-voltage application occasion. Compared with the traditional harmonic suppression algorithm, the proposed algorithm not only realizes the effective compensation from low order harmonics to high order harmonics, but also compensates some specific order harmonics. In addition, the proposed strategy can achieve separation of the negative sequence part from the load current and then compensate it separately under the unbalanced condition. Finally, some experimental results are conducted to verify the correctness and reliability of the proposed algorithm based on a small-scale prototype.

The traditional bidirectional isolated converter has some problems, such as high voltage stress and low efficiency. Therefore, this paper takes the isolated bidirectional three-level half-bridge DC-DC converter (IBTC) as the research object, which has the advantages of low voltage stress and three-level output on both sides of the converter. On the basis of this topology, the two-side chopping and phase shifting control that optimizes the control parameters is proposed. The goal of this control strategy is to minimize root mean square (RMS) of inductor current and realize zero voltage switch (ZVS). The correctness and the effectiveness of the control strategy is verified by simulation and experiment.

Voltage-balancing is the prerequisite of Modular multilevel Converter (MMC) in normal Operation. In this paper, a sub-module capacitor voltage equalization algorithm is proposed. Compared with traditional sub-module voltage sorting algorithm, this scheme ensures the balance of sub-module capacitor voltage and has a strong dynamic regulation ability. Also, it avoids the problem of complex tuning of multiple controller parameters in the traditional control algorithm. In addition, the algorithm not only improves the utilization ratio of DC voltage, reduces the switching loss and output harmonic, but also greatly reduces the computation and the resource occupation of the digital controller only by requires a simple operation of addition, subtraction and shift when the sector judgement and vector action time are calculated. Consequently, a three-phase three-level low-power MMC experimental platform is built. The experimental results show that the proposed algorithm has good dynamic and steady-state performance for MMC system.

The development of the traction power supply system (TPSS) is limited by the existence of the neutral section in the present system. The advanced co-phase traction power supply system (ACTPSS) can reduce the neutral section completely and becomes an important research and development direction of the railway. To ensure the stable operation of ACTPSS, it is necessary to carry out an appropriate power analysis. In this paper, the topology of advanced co-phase traction substation is mainly composed by the three-phase to single-phase cascaded converter. Then, the improved PQ decomposition algorithm is proposed to analyze the power flow. The impedance model of the traction network is calculated and established. The power flow analysis and calculation of the ACTPSS with different locations of locomotive are carried out, which theoretically illustrates that the system can maintain stable operation under various working conditions. The feasibility and operation stability of the ACTPSS are verified by the simulations and low power experiments.

The competition and integration of cultures is an unavoidable trend in the context of globalization, and immigration behavior has significantly accelerated the process of cultural transmission and integration. Cultural change is an evolutionary process in a complex social system. At present, scholars in this field mainly use the complex network model, Axelrod’s cultural communication model, and cellular automata model to simulate the evolution of culture. The process of. Among them, the cellular automaton is a mathematical model with discrete time, space, and variables. Based on the above characteristics of the model, the affected population can be divided into small rectangular units, and time can be divided into units at the same time. Effectively simplified the simulation process.

The single-phase unified power quality conditioner (UPQC) is widely used to improve power quality for sensitive end-users. However, the inherent instantaneous power difference between parallel and series converter will generate significant low-frequency dc-link voltage ripple and degrade the compensation performance of UPQC. The mechanism of dc-link voltage ripple generation and its influences on compensation voltage and current are analyzed in this article. To suppress the influence, a control strategy is proposed for the single-phase UPQC. For parallel converter, a notch filter is introduced in the outer voltage loop to prevent the voltage ripple entering the control loop, the specific order harmonics compensation is proposed in the inner-current loop to reduce the grid current harmonics. For the series converter, the dc-link voltage feedback is adopted to suppress the influence of voltage ripple on the compensation performance. Simulation and experimental results show that the grid current total harmonic distortion (THD) can be reduced effectively with the fixed dc-link capacitance compared with the traditional control strategy. More than half of the load voltage THD are also decreased by the dc-link voltage feedback control. Moreover, with the smaller dc-link capacitance, single-phase UPQC can maintain the better performance under the proposed control strategy.

This paper presents a nearest-level-equivalent space vector modulation (SVM) algorithm for three-phase multilevel converters. The proposed algorithm provides a simple approach to obtain three modulation vectors online based on basic vectors. In addition, the principle of nearest-level modulation (NLM) is applied in the proposed SVM to make its superior performance to the generalized SVM algorithms, which present: (1) Merely one modulation vertex need to be detected and three-phase duty cycles are obtained. Therefore, the unbalanced voltages of inner cell of neutral-point-clamped cascaded multilevel converter (NPC-CMC) can be addressed; (2) Redundant and optimized switching sequences are automatically generated to minimize the number of switching transition; (3) Different modulation modes can be flexibly chosen to optimize the harmonic benefit. The proposed SVM scheme is independent of level numbers and finally verified by simulation and experimental results.

In this article, a fixed and smooth-switch-sequence modulation strategy is proposed to equalize the dc-link voltages among the cascaded rectifier. The structure of a single-phase three-level neutral-point-clamped cascaded rectifier is studied. Three core steps of this strategy are analyzed respectively, including carrier wave disposition calculation, fixed pulse generator, and voltage rank function. In addition, a criterion of the degree of the load unbalance is established in order to measure the voltage balancing boundary of the presented approach. The superiorities of the proposed control strategy embody the smooth switch sequence, the strong voltage balance capability, as well as the fixed switch sequence. Owe to these advantages, the cascaded rectifier could effectively reduce the switching frequency, achieve the goals of voltage balancing, and reduce the calculation burden of the controller when the number of cascaded modules is large. The effectiveness of the proposed strategy is verified by simulation and experiment results.