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The sequence recognition is very essential in mimicking brain’s neocortical function because most of input patterns to brain’s neocortex are dynamically changing over time, not static regardless of time. In this paper, we experimentally demonstrate the sequence recognition for various input sequences using serial memristors, for the first time. In this experiment, the serial memristors are used, which were fabricated with carbon fiber and aluminum film on glass substrate. To verify the sequence recognition, we store the following 3 sequences in the fabricated serial memristors, which are ‘A’→‘B’→‘C’, ‘B’→‘A’→‘C’, and ‘C’→‘B’→‘A’, respectively. By performing this experiment, it is verified the serial memristors are changed to Low Resistance State only when the input sequence matches the stored one. When the input sequence is different from the stored one, the serial memristors remain unchanged. The simple voltage comparator can be used to sense the output voltage to indicate whether the sequence matching happens or not. This experimental demonstration can be very useful to realize memristor crossbars which can process the temporal and sequential patterns in future.

Most of human's intelligent behaviors such as inference, prediction, anticipation, etc. are based on the processing of sequential data from human's sensory systems. Thus, a sequential memory that can process sequential information is very essential to mimic brain's intelligent behaviors. In this paper, we propose a new sequential memristor crossbar which is regarded as the first memristor circuit that copes with the sequential data. The new crossbar is composed of two layers which are the base layer and the sequential one, respectively. The base layer can recognize only static items one by one. The sequential layer can detect the serial order of items and find the best match with the detected sequence among many reference sequences stored in the memristor array. The new crossbar can recognize the tested sequences of items as well as 88.6% on average for the memristance variation of 0%. The variation tolerance is also tested from 0-% variation to 20-% variation in the proposed sequential crossbar.

Nanoscale memristors can be used as synapses in brain-mimicking neuromorphic systems. Here, the fine tuning of memristor conductance is important in controlling the synapse weights precisely, because the coarse tuning of memristor synapses can cause a significant error in neuromorphic processing. In this paper, we propose a new Pulse Amplitude Modulation (PAM) method for the fine tuning of memristor conductance. The new PAM scheme is verified by the experimental measurement of real memristors, where the new PAM could reduce the pulse-to-pulse fluctuation in conductance change per pulse by 84.8%, compared to the previous linear PAM. For comparing the linear and new PAM schemes, they are tested in programming memristor synapses in the memristor-based Cellular Neural Networks (CNN). The simulation result confirms that the new-PAM-programmed CNN shows better quality of edge detection than the linear-PAM-programmed CNN.

Pattern matching or pattern recognition is one of the elemental components that constitute the very complicated recalling and remembering process in human’s brain. To realize this neuromorphic pattern matching, we fabricated and tested a 3 × 3 memristor synaptic array with the winner-take-all method in this research. In the measurement, first, the 3 × 3 Ta2O5 memristor array is programmed to store [LLL], [LHH], and [HLH], where L is a low-resistance state and H is a high-resistance state, at the 1st, 2nd, and 3rd columns, respectively. After the programming, three input patterns, [111], [100], and [010], are applied to the memristor synaptic array. From the measurement results, we confirm that all three input patterns can be recognized well by using a twin memristor crossbar with synaptic arrays. This measurement can be thought of as the first real verification of the twin memristor crossbar with memristive synaptic arrays for neuromorphic pattern recognition.

In this paper, we analyze the variation tolerance of time-shared Twin Memristor Crossbar (TMC) for various inter-correlation and intra-correlation parameters. Here the percentage variation in memristance is increased from 0% to 40%. The statistical analysis performed here indicates the original TMC and the time-shared TMC show almost the same tolerance to memristance variation when the variation of all memristors in one array are assumed random, referred to as intra-array correlation is zero. However, when the intra-array correlation becomes as high as 1, in other words, variations of all memristors in the same array are correlated each other, the time-shared TMC shows better recognition rate by 5% on average, compared to the original TMC. From the statistical simulation results, we can expect the time-shared TMC has better variation-tolerance than the original TMC, in pattern matching application.

Memristors can be used in mimicking synaptic plasticity of biological neuronal systems. In addition, memristor crossbars can be realized in 3-dimensional architecture like human brain. This possibility of 3-dimensional integration is crucial in implementing the full-scale electronic neuron-synapse system in future. One more thing to note here is that memristor-based neuromorphic systems can be more energy-efficient than the conventional Von Neumann ones in some applications such as bio-inspired pattern processing. This is because they are more suitable to brain-like parallel processing. Based on these advantages of memristor-based neuromorphic systems, this paper reviews the memristor logics, where the computation and memory can be merged together. Then, we introduce neuromorphic memristor crossbars which can mimic the brain's pattern recognition of speech and image. The simulation results of neuromorphic crossbars strongly highlight the future possibility of memristor circuits in brain-mimicking pattern processing. In Cellular Nanoscale Network (CNN), memristors can be used in analog multiplication that is essential to perform CNN pixel calculation with low power consumption and high-area density.

Nanoscale memristors can be used as synapses in brain-mimicking neuromorphic systems. To act as synapses, memristors should be programmed or trained for the target synaptic weight values by applying a sequence of voltage pulses. In this paper, we show an implementation of FPGA-based training and recalling system of memristor synapses. Using the implemented FPGA-based training and recalling system of memristor synapses, we compare various pule modulation schemes which can be used in training and recalling memristor synapses. This comparison tells us that the pulse amplitude modulation is more suitable to train memristor synapses precisely than the others.

In this paper, we propose a new time-shared twin memristor crossbar for pattern-recognition applications. By sharing two memristor arrays at different time, the number of memristor arrays can be reduced by half, saving the crossbar area by half, too. To implement the time-shared twin memristor crossbar, we also propose CMOS time-shared subtractor circuit, in this paper. The operation of the time-shared twin memristor crossbar is verified using 3 × 3 memristor array which is made of aluminum film and carbon fiber. Here, the crossbar array is programmed to store three different patterns. When we apply three different input vectors to the array, we can verify that the input vectors are well recognized by the proposed crossbar. Moreover, the proposed crossbar is tested for the recognition of complicated gray-scale images. Here, 10 images with 32 × 32 pixels are applied to the proposed crossbar. The simulation result verifies that the input images are recognized well by the proposed crossbar, even though the noise level of each image is varied from −10 to +10 dB.