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Mixed reality technology has been increasingly used for navigation. While most MR-based navigation systems are currently based on hand-held devices, for example, smartphones, head-mounted MR devices have become more and more popular in navigation. Much research has been conducted to investigate the navigation experience in MR. However, it is still unclear how ordinary users react to the first-person view and FOV (field of view)-limited navigation experience, especially in terms of spatial learning. In our study, we investigate how visualization in MR navigation affects spatial learning. More specifically, we test two related hypotheses: incorrect virtual information can lead users into incorrect spatial learning, and the visualization style of direction can influence users' spatial learning and experience. We designed a user interface in Microsoft HoloLens 2 and conducted a user study with 40 participants. The user study consists of a walking session in which users wear Microsoft HoloLens 2 to navigate to an unknown destination, pre- and post-walking questionnaires, sketch map drawing, and a semi-structured interview about the user interface design. The results provide preliminary confirmation that users' spatial learning can be misled by incorrect information, even in a small study area, but this misleading effect can be compensated by considerate visualization, for example, including lines instead of using only arrows as direction indicators. Arrows with or without lines as two visualization alternatives also influenced the user's spatial learning and evaluation of the designed elements. Besides, the study shows that users' preferences for navigation interfaces are diverse, and an adaptable interface should be provided. The results contribute to the design of head-mounted MR-based navigation interfaces and the application of MR in navigation in general. [ABSTRACT FROM AUTHOR]

In this paper, a low-temperature SiO2 interfacial layer preparation using rapid thermal oxidation (RTO) process for gate-all-around (GAA) nanosheet (NS) based input-output (I/O) transistor is explored in detail. After preparing high-quality thick SiO2 IL at 600℃, its MOS capacitor with W/TiN/HfO2/SiO2/Si substrate structure achieves well behaved multi-frequency capacitance-voltage characteristics, low leakage current, low interfacial trap density (Dit), and excellent time-dependent dielectric breakdown. For instance, its gate leakage under flatband voltage (Vfb) -1 V is only 2.48 × 10–9 A/cm2, its minimum Dit reaches 5.1 × 1010 eV−1 cm−2, and its ten-year lifetime effective voltage can reach 3.62 V at a failure rate of 0.01%. Moreover, a GAA NS based I/O device with a healthy gate stack is successfully prepared using this low-temperature SiO2 interfacial layer and its gate leakage is below 1 × 10–13 A, approaching the detection limit. These above results indicate that this low-temperature RTO-grown SiO2 IL has excellent quality and can meet the requirements of GAA NSs I/O transistors. [ABSTRACT FROM AUTHOR]