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Real-time neural spike detection is an important step in understanding neurological activities and developing brain-silicon interfaces. Recent approaches exploit minimally invasive sensing techniques based on implanted complementary metal-oxide semiconductors (CMOS) multi transistors arrays (MTAs) that limit the damage of the neural tissue and provide high spatial resolution. Unfortunately, MTAs result in low signal-to-noise ratios due to the weak capacitive coupling between the nearby neurons and the sensor and the high noise power coming from the analog front-end. In this paper we investigate the performance achievable by using spike detection algorithms for MTAs, based on some variants of the smoothed non-linear energy operator (SNEO). We show that detection performance benefits from the correlation of the signals detected by the MTA pixels, but degrades when a high firing rate of neurons occurs. We present and compare different approaches and noise estimation techniques for the SNEO, aimed at increasing the detection accuracy at low SNR and making it less dependent on neurons firing rates. The algorithms are tested by using synthetic neural signals obtained with a modified version of NEUROCUBE generator. The proposed approaches outperform the SNEO, showing a more than 20% increase on averaged sensitivity at 0 dB and reduced dependence on the neuronal firing rate.

This work presents a comparison between different neural spike algorithms to find the optimum for in vivo implanted EOSFET (electrolyte-oxide-semiconductor field effect transistor) sensors. EOSFET arrays are planar sensors capable of sensing the electrical activity of nearby neuron populations in both in vitro cultures and in vivo experiments. They are characterized by a high cell-like resolution and low invasiveness compared to probes with passive electrodes, but exhibit a higher noise power that requires ad hoc spike detection algorithms to detect relevant biological activity. Algorithms for implanted devices require good detection accuracy performance and low power consumption due to the limited power budget of implanted devices. A figure of merit (FoM) based on accuracy and resource consumption is presented and used to compare different algorithms present in the literature, such as the smoothed nonlinear energy operator and correlation-based algorithms. A multi transistor array (MTA) sensor of 7 honeycomb pixels of a 30 µm2 area is simulated, generating a signal with Neurocube. This signal is then used to validate the algorithms’ performances. The results allow us to numerically determine which is the most efficient algorithm in the case of power constraint in implantable devices and to characterize its performance in terms of accuracy and resource usage.

Setting the threshold for a spike detection method is always challenging. The amplitude of the spikes that can be recognized really depends on the noise present in the recording and the threshold must set a good tradeoff between the false detection of noise fluctuations and the smaller spikes. In this work we demonstrate how common approaches to automatic threshold estimation are highly affected by changes in the firing rate of neurons, causing the threshold to become an unreliable yardstick of evaluation between different channels and even within the same recording. For this reason, here we propose a noise estimation method relying on the base 2 logarithm, suitable for the automatic setting of a firing-rate independent threshold for spike detection methods. We compare its performances against other statistical variability indices as the widely used RMS, the mean, and the median of the absolute value of the signal both qualitatively and quantitatively, while varying the firing rate exhibited by the testbench dataset. Our results indicate that while the RMS and the mean are heavily affected by the firing rate, our proposed method performs almost equally to the median-based estimation, but the complexity of the latter poses it as an optimal solution for applications requiring a real-time definition of the threshold.

High-density CMOS-based Multielectrode Arrays (MEA) provide thousands of channels to record extracellular electrical activity of neuronal networks. Such a high channels count generates an amount of data that is difficult to manage with long-term fully implantable neural interfaces, where power and data transmission are provided wirelessly. To overcome this limitation, a low resources digital signal processor able to reduce the amount of transmitted data to a relevant subset represented by the spiking activity is essential. Unfortunately, the resources required to detect spikes linearly grow with the number of channels, limiting the total amount of MEA pixels in these devices. This work presents a method, here called Spike Detection-by-Difference (SDD), to drastically reduce this limit, for real-time spike detection with an impact on resources and consumption independent from the total channels count. It exploits the high resolution of MEAs to separate the highly localized extracellular action potential from the large-scale local field potential. The SDD is compared with the standard spike detection approaches as the Threshold Crossing (TC) and the Nonlinear Energy Operator (NEO). The detection accuracy is compared for different spiking amplitudes on a synthetic dataset generated from real recordings, showing a detection accuracy of 90% for spikes as low as 45 µV, with a noise in the frequency band from 300 Hz to 5 kHz of 10 µVrms. Furthermore, the resource consumption shows a reduction of the 91,5% compared to the TC and of 94% compared to the NEO on a 32x32 pixels matrix. This reduction can be further accentuated increasing the matrix size or reducing the number of columns.

Numerous experiments require low latencies in the detection and processing of the neural brain activity to be feasible, in the order of a few milliseconds from action to reaction. In this paper, a design for sub-millisecond detection and communication of the spiking activity detected by an array of 32 intracortical microelectrodes is presented, exploiting the real-time processing provided by Field Programmable Gate Array (FPGA). The design is embedded in the commercially available RHS stimulation/recording controller from Intan Technologies, that allows recording intracortical signals and performing IntraCortical MicroStimulation (ICMS). The Spike Detector (SD) is based on the Smoothed Nonlinear Energy Operator (SNEO) and includes a novel approach to estimate an RMS-based firing-rate-independent threshold, that can be tuned to fine detect both the single Action Potential (AP) and Multi Unit Activity (MUA). A low-latency SD together with the ICMS capability, creates a powerful tool for Brain-Computer-Interface (BCI) closed-loop experiments relying on the neuronal activity-dependent stimulation. The design also includes: A third order Butterworth high-pass IIR filter and a Savitzky-Golay polynomial fitting; a privileged fast USB connection to stream the detected spikes to a host computer and a sub-milliseconds latency Universal Asynchronous Receiver-Transmitter (UART) protocol communication to send detections and receive ICMS triggers. The source code and the instruction of the project can be found on GitHub.

This paper presents the results of a multidisciplinary experiment where the electrical activity of a rat hippocampus cultured neurons population has been detected and mapped by an advanced FPGA spike-sorting algorithm. Neurons are growth over a silicon chip that is thus capacitively coupled with neuronal cells. Due to noise power coming from bio-silicon interface and analog electronics signal processing, the Action Potentials detection intrinsically needs advanced noise rejection algorithms which are often software/off-line implemented. This approach disables instantaneous detection of neural spikes and cannot be obviously used for real-time electrical stimulation. In this scenario, this paper presents a proper FPGA system able to separate relevant neuronal cells potentials from noise. The FPGA output signals provide real time spatial mapping of biosensor electrical activity, noise and synchronous neural network activity.

This paper presents the result of a multidisciplinary experiment where electrical activity from a cultured rat hippocampi neuronal population is detected in real time by a FPGA implemented digital circuit. State-of-the-art EOMOSFET Multi Electrode Array (MEA) biosensors exploits a capacitive coupling between the biological environment and the sensing electronics to minimize invasiveness and cell damage, at the price of a lower SNR. For this reason, they are typically improved by noise rejection algorithms. Real time neural spikes detection opens unthinkable scenarios, allowing to stimulate single neurons in response to their behavior, possibly improving medical conditions like epilepsy. In this scenario, a spike sorting algorithm has been hardware implemented, allowing real time neural spike detection with a latency of 165ns

This paper presents a multidisciplinary experiment where a population of neurons, dissociated from rat hippocampi, has been cultivated over a CMOS-based micro-electrode array (MEA) and its electrical activity has been detected and mapped by an advanced spike-sorting algorithm implemented on FPGA. MEAs are characterized by low signal-to-noise ratios caused by both the contactless sensing of weak extracellular voltages and the high noise power coming from cells and analog electronics signal processing. This low SNR forces to utilize advanced noise rejection algorithms to separate relevant neural activity from noise, which are usually implemented via software/off-line. However, off-line detection of neural spikes cannot be obviously used for real-time electrical stimulation. In this scenario, this paper presents a proper FPGA-based system capable to detect in real-time neural spikes from background noise. The output signals of the proposed system provide real-time spatial and temporal information about the culture electrical activity and the noise power distribution with a minimum latency of 165 ns. The output bit-stream can be further utilized to detect synchronous activity within the neural network.

In this paper we investigated atomic layer deposition (ALD) TiO2 thin films deposited on implantable neurochips based on electrolyte-oxide-semiconductor (EOS) junctions, implementing both efficient capacitive neuron-silicon coupling and biocompatibility for long-term implantable functionality. The ALD process was performed at 295 degrees C using titanium tetraisopropoxide and ozone as precursors on needle-shaped silicon substrates. Engineering of the capacitance of the EOS junctions introducing a thin Al2O3 buffer layer between TiO2 and silicon resulted in a further increase of the specific capacitance. Biocompatibility for long-term implantable neuroprosthetic systems was checked upon in-vitro treatment. (C) 2011 Elsevier B.V. All rights reserved.