214 results on '"U, Seng-Pan"'
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2. A sub-1V 78-nA bandgap reference with curvature compensation
3. Conclusions and Prospective for Future Work
4. Experimental Results
5. Design of a 1.2 V, 10-bit, 60–360 MHz Time-Interleaved Pipelined ADC
6. Time-Interleaving: Multiplying the Speed of the ADC
7. Advanced Low Voltage Circuit Techniques
8. Introduction
9. Challenges in Low-Voltage Circuit Designs
10. Analog Front-End Design for Mobile and Multimedia SoC
11. A 2.63 μW ECG Processor With Adaptive Arrhythmia Detection and Data Compression for Implantable Cardiac Monitoring Device
12. Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active–passive loop-filters
13. A 2.52 μΑ Wearable Single Lead Ternary Neural Network Based Cardiac Arrhythmia Detection Processor
14. Generalized circuit techniques for low-voltage high-speed reset- and switched-opamps
15. Statistical spectra and distortion analysis of time-interleaved sampling bandwidth mismatch
16. On the design of a programmable-gain amplifier with built-in compact dc-offset cancellers for very low-voltage WLAN systems
17. Two-step channel selection--a novel technique for reconfigurable multistandard transceiver front-ends
18. A 17.7-pJ/Cycle ECG Processor for Arrhythmia Detection with High Immunity to Power Line Interference and Baseline Drift
19. Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters
20. Introduction
21. Experimental Results
22. Conclusions and Prospective for Future Work
23. Challenges in Low-Voltage Circuit Designs
24. Time-Interleaving: Multiplying the Speed of the ADC
25. Advanced Low Voltage Circuit Techniques
26. Design of a 1.2 V, 10-bit, 60–360 MHz Time-Interleaved Pipelined ADC
27. Analog-Baseband Architectures And Circuits For Multistandard And Lowvoltage Wireless Transceivers
28. A 1.2V 86dB SNDR 500kHz BW Linear-Exponential Multi-Bit Incremental ADC Using Positive Feedback in 65nm CMOS
29. A dual-output SC converter with dynamic power allocation for multicore application processors
30. A 550-$\mu$ W 20-kHz BW 100.8-dB SNDR Linear- Exponential Multi-Bit Incremental $\Sigma\Delta$ ADC With 256 Clock Cycles in 65-nm CMOS
31. Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC With Optimal Code Transfer Technique
32. Gain Error Calibrations for Two-Step ADCs: Optimizations Either in Accuracy or Chip Area
33. A 7b 2 GS/s Time-Interleaved SAR ADC with Time Skew Calibration Based on Current Integrating Sampler
34. Analysis of Common-Mode Interference and Jitter of Clock Receiver Circuits With Improved Topology
35. A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration
36. A 16-mW 1-GS/s With 49.6-dB SNDR TI-SAR ADC for Software-Defined Radio in 65-nm CMOS
37. Passive Noise Shaping in SAR ADC With Improved Efficiency
38. An Analog-Assisted Tri-Loop Digital Low-Dropout Regulator
39. A Dual-symmetrical-output Switched-capacitor Converter with Dynamic Power Cells and Minimized Cross Regulation for Application Processors in 28nm CMOS
40. A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH $\Delta \Sigma $ Modulator With Multirate Opamp Sharing
41. 60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration
42. A 12b 180MS/s 0.068mm2 With Full-Calibration-Integrated Pipelined-SAR ADC
43. Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial $V_{\mathrm {cm}}$ -Based Switching
44. Reconfigurable mismatch‐free time‐interleaved bandpass sigma–delta modulator for wireless communications
45. DCM operation analysis of 3‐level boost converters
46. 16.4 A 5mW 7b 2.4GS/s 1-then-2b/cycle SAR ADC with background offset calibration
47. A Dual-Output Wireless Power Transfer System With Active Rectifier and Three-Level Operation
48. A 10-bit 500-MS/s Partial-Interleaving Pipelined SAR ADC With Offset and Reference Mismatch Calibrations
49. Active–Passive $\Delta \Sigma $ Modulator for High-Resolution and Low-Power Applications
50. SSCS Macau Organizes a Series of Distinguished Lectures and Workshops on Advanced IC Design [Chapters]
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