Author: "Tze Yin Cheung" - Searchworks@Jio Institute Digital Library Search Results

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1. 8.5 A Scalable Adaptive ADC/DSP-Based 1.25-to-56Gbps/112Gbps High-Speed Transceiver Architecture Using Decision-Directed MMSE CDR in 16nm and 7nm.

Author: Danfeng Xu, Yu Kou, Paul Lai, Zichuan Cheng, Tze Yin Cheung, Larry Moser, Yang Zhang, Xiaolong Liu, Man Pio Lam, Haikun Jia, Quan Pan 0002, Wing Hong Szeto, Chi Fai Tang, Ka Fai Mak, Khawar Sarfraz, Tairan Zhu, Ming Kwan, Emily Yim Lee Au, Cormac Conroy, and Kai-Keung Chan
Published: 2021
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2. Narrow-width design methodology for operational amplifiers in SOI technology

Author: Tze-yin Cheung
Published: 2014
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