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Your search keyword '"Turchetti, Claudio"' showing total 293 results
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293 results on '"Turchetti, Claudio"'

1. Decomposition of linear tensor transformations

Author

Turchetti, Claudio

Subjects
Computer Science - Computer Vision and Pattern Recognition, Mathematics - Numerical Analysis
Abstract

One of the main issues in computing a tensor decomposition is how to choose the number of rank-one components, since there is no finite algorithms for determining the rank of a tensor. A commonly used approach for this purpose is to find a low-dimensional subspace by solving an optimization problem and assuming the number of components is fixed. However, even though this algorithm is efficient and easy to implement, it often converges to poor local minima and suffers from outliers and noise. The aim of this paper is to develop a mathematical framework for exact tensor decomposition that is able to represent a tensor as the sum of a finite number of low-rank tensors. In the paper three different problems will be carried out to derive: i) the decomposition of a non-negative self-adjoint tensor operator; ii) the decomposition of a linear tensor transformation; iii) the decomposition of a generic tensor., Comment: arXiv admin note: text overlap with arXiv:2305.02803

Published
2023

2. Tensor PCA from basis in tensor space

Author

Turchetti, Claudio and Falaschetti, Laura

Subjects
Mathematics - Numerical Analysis, Computer Science - Computer Vision and Pattern Recognition, Computer Science - Machine Learning
Abstract

The aim of this paper is to present a mathematical framework for tensor PCA. The proposed approach is able to overcome the limitations of previous methods that extract a low dimensional subspace by iteratively solving an optimization problem. The core of the proposed approach is the derivation of a basis in tensor space from a real self-adjoint tensor operator, thus reducing the problem of deriving a basis to an eigenvalue problem. Three different cases have been studied to derive: i) a basis from a self-adjoint tensor operator; ii) a rank-1 basis; iii) a basis in a subspace. In particular, the equivalence between eigenvalue equation for a real self-adjoint tensor operator and standard matrix eigenvalue equation has been proven. For all the three cases considered, a subspace approach has been adopted to derive a tensor PCA. Experiments on image datasets validate the proposed mathematical framework., Comment: This version contains a new experiment better showing the potentiality of the paper and a corrected autor list. This work has been submitted to the IEEE for possible publication. Copyright may be transferred without notice, after which this version may no longer be accessible

Published
2023

8. SARS-CoV-2 multi-variant rapid detector based on graphene transistor functionalized with an engineered dimeric ACE2 receptor

Author

Romagnoli, Alice, D’Agostino, Mattia, Pavoni, Eleonora, Ardiccioni, Chiara, Motta, Stefano, Crippa, Paolo, Biagetti, Giorgio, Notarstefano, Valentina, Rexha, Jesmina, Perta, Nunzio, Barocci, Simone, Costabile, Brianna K., Colasurdo, Gabriele, Caucci, Sara, Mencarelli, Davide, Turchetti, Claudio, Farina, Marco, Pierantoni, Luca, La Teana, Anna, Al Hadi, Richard, Cicconardi, Francesco, Chinappi, Mauro, Trucchi, Emiliano, Mancia, Filippo, Menzo, Stefano, Morozzo della Rocca, Blasco, D’Annessa, Ilda, and Di Marino, Daniele

Published
2023
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18. Activity Monitoring and Phase Detection Using a Portable EMG/ECG System

Author

Scherz, Wulhelm Daniel, Seepold, Ralf, Martínez Madrid, Natividad, Crippa, Paolo, Biagetti, Giorgio, Falaschetti, Laura, Turchetti, Claudio, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martin, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Saponara, Sergio, editor, and De Gloria, Alessandro, editor

Published
2019
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27. A Portable Wireless sEMG and Inertial Acquisition System for Human Activity Monitoring

Author

Biagetti, Giorgio, Crippa, Paolo, Falaschetti, Laura, Orcioni, Simone, Turchetti, Claudio, Hutchison, David, Series editor, Kanade, Takeo, Series editor, Kittler, Josef, Series editor, Kleinberg, Jon M., Series editor, Mattern, Friedemann, Series editor, Mitchell, John C., Series editor, Naor, Moni, Series editor, Pandu Rangan, C., Series editor, Steffen, Bernhard, Series editor, Terzopoulos, Demetri, Series editor, Tygar, Doug, Series editor, Weikum, Gerhard, Series editor, Rojas, Ignacio, editor, and Ortuño, Francisco, editor

Published
2017
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44. Open-Source HW/SW Co-Simulation Using QEMU and GHDL for VHDL-Based SoC Design.

Author

Biagetti, Giorgio, Falaschetti, Laura, Crippa, Paolo, Alessandrini, Michele, and Turchetti, Claudio

Subjects
DIGITAL electronics, COMPUTER firmware, DEBUGGING, DESIGN
Abstract

Hardware/software co-simulation is a technique that can help design and validate digital circuits controlled by embedded processors. Co-simulation has largely been applied to system-level models, and tools for SystemC or SystemVerilog are readily available, but they are either not compatible or very cumbersome to use with VHDL, the most commonly used language for FPGA design. This paper presents a direct, simple-to-use solution to co-simulate a VHDL design together with the firmware (FW) that controls it. It aims to bring the power of co-simulation to every digital designer, so it uses open-source tools, and the developed code is also open. A small patch applied to the QEMU emulator allows it to communicate with a custom-written VHDL module that exposes a CPU bus to the digital design, controlled by the FW emulated in QEMU. No changes to FW code or VHDL device code are required: with our approach, it is possible to co-simulate the very same code base that would then be implemented into an FPGA, enabling debugging, verification, and tracing capabilities that would not be possible even with the real hardware. [ABSTRACT FROM AUTHOR]

Published
2023
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