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Constrained by the transimpedance limit, the conventional 1-stage shunt-feedback transimpedance amplifier (1S-SF-TIA) suffers poor noise and gain at higher data rates. In this paper, we propose to use a multi-stage stagger-tuned amplifier (MSTA) to constitute TIA (MSTA-TIA), which not only transcends the transimpedance limit of 1S-SF-TIA, but also realizes noise reduction in multiple fronts. First, the high-gain MSTA enables 17X TIA gain over 1S-SF-TIA, which effectively suppresses the white noise. Second, the MSTA realizes at least 2.8X~1.6 lower noise than the conventional multi-stage amplifier, which is essential to form low-noise TIA since the amplifier noise usually dominates. Third, the TIA built upon the 3-stage STA also shows steeper out-of-band roll-off to enable high-frequency noise reduction. Overall, the MSTA-TIA achieves 6.9X and 1.9X noise power reduction over conventional single-stage and multi-stage SF-TIAs. As a demonstration, a 10 Gb/s optical receiver front-end prototype employing proposed MSTA-TIA topology is implemented in a standard $0.18~\mu \text{m}$ CMOS technology. It achieves transimpedance gain of 68.3dB $\Omega $ , electrical bandwidth of 8.5GHz, and excellent input-referred noise current of $0.97~\mu $ Arms. The chip occupies 0.78 mm2 while consuming 43 mA from 1.8 V power supply. The low-noise design methodology in this paper empowers mature CMOS to compete with SiGe to make low-noise high-gain optical IC.

Purpose Stability of a nonlinear, tuned amplifier has been investigated based on the describing function method. On stability, this paper means global asymptotic stability. The tuned amplifier comprises a saturated amplifying device with feedback and two resonators, at the input and the output. Describing function method here means introduction of the two-port describing functions. Design/methodology/approach Describing function method is applied, extended for two ports. Results from complex analysis and matrix algebra are heavily used. The two resonators have identical resonant frequency and bandwidth. Instability is represented by non-vanishing output perturbation for zero-input perturbation. Applying a simple transistor model with saturation and feedback, stability is analyzed in the form of output voltage as a function of input voltage. Findings Two-port scattering and admittance describing functions have been introduced. At a certain input voltage amplitude, instability appears in the form of unwanted sidebands, then at a higher input voltage, instability disappears, in good agreement with experiments. The hand calculated stability limits are in good agreement with the computer analysis. Originality/value The paper is based on an early publication of the author (Baranyi and Ladvánszky, 1984). Here, the full material is presented, explained step by step, extended and revised. All neglections that were earlier made in the author’s paper have been avoided here. This paper has significant tutorial value as well.

In a congested radio spectrum, radar systems must be capable of sharing spectrum in real time. Two possible radar transmission approaches involve either avoiding interferers or placing a notch in the sub-bands of interference. Impedance tuning allows the radar transmitter power amplifier to maximize its output power while adjusting its linearity to meet notch and/or out-of-band spectral requirements. In real-time spectrum sharing, the system controller decides whether to provide a waveform that notches around the interference or to avoid the interference altogether. Considerations in this decision include the maximum detection range obtainable from a tuned amplifier versus the finest achievable range resolution, based on transmitted bandwidth. This paper describes a comparison of real-time impedance tuning for notched, random FM waveforms versus a contiguous-band chirp used for avoidance. Comparisons are made between the range (calculated from output power) and the range resolution (calculated from bandwidth) obtained by the optimized circuits in these two cases.

A clock recovery circuit for a full-rate 40 Gb/s optical receiver is presented. The proposed circuit consists of a frequency doubling block, a mixer-based phase detector, and a 40 GHz voltage-controlled oscillator. The frequency doubling block, consisting of a tuned amplifier and a frequency doubler, adopts the LC-resonator loads, rather than the conventional resistive loads, which realizes operation at 40 GHz clock frequency. The circuit is fabricated in 0.13-μm CMOS technology. Measurement results indicate that the proposed circuit is able to recover a 40 GHz clock. The recovered clock frequency is at least 1.4 times higher than other competing circuits.

This paper applies a simulated annealing (SA) algorithm to analyze and compute the power output of the interstage coupled tuned amplifier problems that are very hard to be optimized. The inverse of the power output of circuit problem is converted into multivariable unconstrained optimization problem to serve as the cost function. A variable cooling factor (VCF) incorporated into the SA algorithm to give a new algorithm, called Powell?s-simulated annealing (PSA) algorithm, was used to find the global minimum of the cost function. The PSA algorithm has been compared with the conjugate gradient and Nelder and Mead Simplex methods using the same cost function. The PSA algorithm proved to be more reliable than the other algorithms as it was always able to find optimum at a point or very close to it in a very good execution time. The solution of integrated circuit problems can easily be found through the PSA algorithm. The PSA algorithm has also been programmed to run on android smartphone systems to facilitate the computations, design and analysis of the coupled tuned amplifier problem.

Power amplifiers are used to convert a small high frequency signal to large high frequency signal for transmission through a microwave antenna to another microwave antenna. As the required distance between the microwave antenna increases, more power is required at the base station in order to transmit. The transistor used here is the CREE CGH40010 transistor. Using the transistor specifications and characterizations, the input and output matching networks are designed, followed by the designing of biasing network. The theoretical amplifier gain at the operating frequency 2.5GHz is 19dB. The simulated gain before tuning is 11dB. The tuned amplifier, adjusting the matching network in real-time is 18dB. The two stage power amplifier is designed to double the gain. The two stage power amplifier gain at 2.5GHz is 33.41dB.

Nowadays, with the technological evolution, the use of wireless identification devices is growing up. RFIDs tags are being used to track a product through an assembly line, packaged goods, animals and even humans. The system proposed on this paper intends to identify whether a passive tag goes in or out of the reader area. The device is composed by a linear antenna, a tuned amplifier and a VSWR meter, fully integrated on a Printed Circuit Board (PCB). The tuned amplifier receives a 400MHz signal, filtering all frequencies out of desired range, amplifies the signal and delivers it to a narrowband antenna through a VSWR meter, obtaining the standing wave ratio, i. e., quantifying the matching between amplifier output, transmission line and antenna input impedance. When a 400MHz tag approaches, the VSWR meter identifies a mismatching variation. This paper specifies the device's design and testing procedures, presents the first results and proposes some technical improvements.

The work mainly by the front level attenuator, the LC tuned amplifier, the push-pull output stage is composed. The first level weakens 40dB fixedly through pi the attenuator realization. Front the double grid field effect manages 3SK223 to make the level to increase the controllable LC tuned amplifier, the LC resonance by double harmonious and the list harmonious cascade way, enhanced the system selectivity. The complete machine gain is bigger than the 80dB, AGC control area to achieve above 60dB.The output stage uses the low pressure high electric current high speed axle to the axle structure integration operational amplifier OPA2354 push-pull transformer coupling output, sharpened the belt load capacity greatly. In order to reduce the amplifier as far as possible the noise and ceases the high frequency auto excitation, this design has adopted the power source filter, the shield, electromagnetic compatibility, the interstate coupling, the impedance matching and so on many kinds of measures. After the test, this plan has completed completely the basic function and the expansion function. Sweeps the frequency source turning on input end after CPLD self-made DDS, May very convenient see the system frequency response on the oscilloscope.

The low frequency tuned amplifiers as well as oscillators are very difficult to design because the size of inductor becomes very large. It is impossible to realize such a large value of inductor practically. This paper presents an alternate method of using simulated inductor instead of passive component L at low frequencies. The design of simulated inductor for low frequency amplifiers and oscillators are presented. The simulation is done using the analog simulation software PSPICE and the results are shown graphically using MATLAB

The paper presents the power amplifier design. The introduction of a practical harmonic balance capability at the device measurement stage brings a number of advantages and challenges. Breaking down this traditional barrier means that the test-bench engineer needs to become more aware of the design process and requirements. The inverse is also true, as the measurement specifications for a harmonically tuned amplifier are a bit more complex than just the measurement of load-pull contours. We hope that the new level of integration between both will also result in better exchanges between both sides and go beyond showing either very accurate, highly tuned device models, or using the device model as the traditional scapegoat for unsuccessful PA designs. A nonlinear model and its quality can now be diagnosed through direct comparison of simulated and measured wave forms. The quality of a PA design can be verified by placing the device within the measurement system, practical harmonic balance emulator into the same impedance state in which it will operate in the actual realized design.

A novel high performance transconductor-based mutually coupled circuit topology is presented, employing four active devices (six, if differential-output devices are not available) and only grounded passive elements. The primary and secondary self-inductances and the mutual inductance can be controlled independently. Being constructed with integrator and transconductor blocks, the circuit offers excellent sensitivity, stability and high frequency performances. The current-conveyor-based implementation is also presented to avail comparison with previous counterparts. Via measurements and simulations, theoretical predictions are verified and the comparisons are performed. As an RF application example, a tuned amplifier is built and simulated.

A systematic methodology for layout optimization of active devices for millimeter-wave (mm-wave) application is proposed. A hybrid mm-wave modeling technique was developed to extend the validity of the device compact models up to 100 GHz. These methods resulted in the design of a customized 90 nm device layout which yields an extrapolated of 300 GHz from an intrinsic device . The device is incorporated into a low-power 60 GHz amplifier consuming 10.5 mW, providing 12.2 dB of gain, and an output of 4 dBm. An experimental three-stage 104 GHz tuned amplifier has a measured peak gain of 9.3 dB. Finally, a Colpitts oscillator operating at 104 GHz delivers up to 5 dBm of output power while consuming 6.5 mW.

This paper report describes the performance of a multi stage tuned amplifier. Tuning can be done to select only desired frequency and to get the required output. Single tuned amplifier selects the frequency equal to the resonant frequency. At resonant frequency it can provide higher impedance but it has few disadvantages like poor selectivity, poor bandwidth, and greater power loss in order to overcome these problems double tuned amplifier has been used. Double tuned amplifier has two tuning circuits and thus larger gain can be achieved by cascading double tuned amplifier. This cascade amplifier arrangement is beneficiary to improve the Q factor, selectivity, sensitivity, improved frequency response and less power loss.

A specific design technique of harmonic tuned power amplifiers based on FET device assumption is developed in this paper. The main issue of this methodology is to understand how to access the device's intrinsic drain. Design equations are presented for the distributed output matching networks, which can be used independently of the harmonic tuned amplifier type. In order to validate the presented technique, two hybrid amplifiers have been implemented, the former is a Tuned Load power amplifier and the latter is an inverse Class F one. The superiority of the inverse Class F amplifier, in terms of efficiency, gain and output power, has been demonstrated. The efficiency in saturation of the inverse Class F module reached 70 %, placing this amplifier in the state-of-the-art for amplifiers using GaN-HEMT devices at frequencies close to 2.4-GHz.

A simple and novel measurement technique to obtain three-port network-parameters of MOS transistors from two-port measurements on a single test structure is presented. The measured data is used in the form of a lookup table (LUT) for RF circuit simulation. It is shown that simulation results obtained with the LUT approach for a 2.4-GHz low-noise amplifier match very well with measurements, thus demonstrating the usefulness of the LUT approach. It is also shown that, for high frequencies, it is important to use the tables of y-parameters actually measured rather than those interpolated from low-frequency measurements. This is illustrated with a tuned amplifier simulation example., IEEE

We report common-base medium power amplifiers designed for G-band (140-220 GHz) and W-band (75-110 GHz) in InP mesa double HBT technology. The common-base topology is preferred over common-emitter and common-collector topologies due to its superior high-frequency maximum stable gain (MSG). Base feed inductance and collector emitter overlap capacitance, however, reduce the common-base MSG. A single-sided collector contact reduces Cce and, hence, improves the MSG. A single-stage common-base tuned amplifier exhibited 7-dB small-signal gain at 176 GHz. This amplifier demonstrated 8.7-dBm output power with 5-dB associated power gain at 172 GHz. A two-stage common-base amplifier exhibited 8.1-dBm output power with 6.3-dB associated power gain at 176 GHz and demonstrated 9.1-dBm saturated output power. Another two-stage common-base amplifier exhibited 11.6-dBm output power with an associated power gain of 4.5 dB at 148 GHz. In the W-band, different designs of single-stage common-base power amplifiers demonstrated saturated output power of 15.1 dBm at 84 GHz and 13.7 dBm at 93 GHz

We have developed a 27- and 40-GHz tuned amplifier and a 52.5-GHz voltage-controlled oscillator using 0.18-mum CMOS. The line-reflect-line calibrations with a microstrip-line structure, consisting of metal1 and metal6, was quite effective to extract the accurate S-parameters for the intrinsic transistor on an Si substrate and realized the precise design. Using this technique, we obtained a 17-dB gain and 14-dBm output power at 27 GHz for the tuned amplifier. We also obtained a 7-dB gain and a 10.4-dBm output power with a good input and output return loss at 40 GHz. Additionally, we obtained an oscillation frequency of 52.5 GHz with phase noise of -86 dBc/Hz at a 1-MHz offset. These results indicate that our proposed technique is suitable for CMOS millimeter-wave design

In an earlier study [Hear. Res. 149 (2000) 55] velocity amplitudes of the outer Hensen's cell (HC) and basilar membrane (BM) were measured before, and at different times, after, sacrificing the animal. The velocity amplitude changed in a way that was characteristic of a negative feedback amplifier. A simple negative feedback amplifier model was proposed to explain the magnitude of the HC and BM velocity changes at CF. In the experiment tuning changed as well, both at the HC and BM. The model has now been extended to include tuning changes. The model response is compared with the experimental observations. The model is able to account quantitatively for the following experimental observations: (i) At the HC the tuning broadens and velocity decreases slowly after sacrifice. (ii) At the BM tuning sharpens and velocity increases at a faster rate. (iii) The velocity increase at BM is much larger than the decrease at HC.

A correlational gas analyzer, comprising a light source with the light beam passed through the gas under study with a quasiperiodic pattern of the spectral band, and an optical system with sequentially positioned along the light beam condensor, input slit iris, beam dispering element and rotatably mounted output slit iris configured as a disc with a slit shaped as an Archimedes spiral. The Archimedes spiral center is coincident with the disc center and its pitch is approximately equal to the scan length of the specified spectral band of the gas under study. The output slit iris scans the specified spectral band of the gas under study across a photoreceiver, the outputs whereof drive the inputs of a first and second electric signal amplifier, with the outputs thereof connected to connected in series corrector unit and recorder. The first amplifier is a tuned amplifier with resonant frequency defined by the speed of disc rotation and by the number of maxima or minima in the specified spectral band of the gas under study.

A 23.8-GHz tuned amplifier is demonstrated in a partially scaled 0.1-/spl mu/m silicon-on-insulator CMOS technology. The fully integrated three-stage amplifier employs a common-gate, source-follower, and cascode with on-chip spiral inductors and MOS capacitors. The gain is 7.3 dB, while input and output reflection coefficients are -45 and -9.4 dB, respectively. Positive gain is exhibited beyond 26 GHz. The amplifier draws 53 mA from a 1.5-V supply. The measured on-wafer noise figure is 10 dB, while the input-referred third-order intercept point is -7.8 dBm. The results demonstrate that 0.1-/spl mu/m CMOS technology may be used for 20-GHz RF applications and suggest even higher operating frequencies and better performance for further scaled technologies.

In this paper a complete and self-contained account of composite periodic signals with two and three harmonics which possess flattened extrema at the zero point, including their application in the balance power analysis of a HF high-power tuned amplifier (HFHPTA), is presented. It is shown that signals obtained in the balance power analysis of HFHPTA and their derivatives can extremely accurately be approximated with the corresponding signals with flattened extrema at the point /spl theta/=0. Two theorems presented in the paper give canonical representations of such signals.

The effects of substrate resistances on the performance of 5.8-GHz low-noise amplifiers (LNAs) have been evaluated through a combination of experimental and simulation studies. The substrate resistive network for the LNA has been constructed by fabricating and measuring a test structure. The substrate resistances can be significantly affected by the die area and thickness, which raises a serious concern for on-wafer testing and optimization of circuits using the test results. The substrate resistances reduce the simulated gain by more than 10 dB and increase the noise figure by 2.7 dB. The simulation study has shown that the dominant substrate resistances are those associated with the bondpads. To reduce the effects of the substrate resistances, a ground-shielded bondpad structure, which consists of a Metal 2 pad and an n/sup +/ plug grounded shield separated by a composite oxide layer, has been developed. It reduces the resistance to ground to almost zero by conducting the signal away from the substrate to ground through the low-resistivity n/sup +/ plug layer. The pad structure in addition improves the interpad isolation by as much as 35 dB. However, to harness this isolation improvement, the inductance between the IC and PC board ground should be made small by using a low ground inductance package. Using this ground-shielded bondpad, the measured gain and noise figure of a 4.5-GHz tuned amplifier were improved by 10 and 2 dB, respectively, over the same circuit implemented using the conventional bondpad.

An 80-GHz six-stage common source tuned amplifier has been demonstrated using low leakage (higher VT) NMOS transistors of a 65-nm digital CMOS process with six metal levels. It achieves power gain of 12 dB at 80 GHz with a 3-dB bandwidth of 6 GHz, noise figures (NF's) lower than 10.5 dB at frequencies between 75 and 81 GHz with the lowest NF of 9 dB. IP1 dB is -21 dBm and IIP3 is -11.5 dBm. The amplifier consumes 27 mA from a 1.2 V supply. At VDD = 1.5 V and 33 mA bias current, NF is less than 9.5 dB within the 3-dB bandwidth and reaches a minimum of 8 dB at 80 GHz.

Four- and 13-GHz tuned amplifiers have been implemented in a partially scaled 0.1-1 /spl mu/m CMOS technology on bulk, silicon-on-insulator (SOI), and silicon-on-sapphire (SOS) substrates. The 4-GHz bulk, SOI, and SOS amplifiers exhibit forward gains of 14, 11, and 12.5 dB and F/sub min/'s of 4.5 (bulk) and 3.5 db (SOS). The 13-GHz SOS and SOI amplifiers exhibit gains of 15 and 5.3 dB and F/sub unn/'s of 4.9 and 7.8 dB. The 4-GHz bulk amplifier has the highest resonant frequency among reported bulk CMOS amplifiers, while the 13-GHz SOS and SOI amplifiers are the first in a CMOS technology to have tuned frequencies greater than 10 GHz. These and other measurement results suggest that it may be possible to implement 20-GHz tuned amplifiers in a fully scaled 0.1-1 /spl mu/m CMOS process.

A new bandpass amplifier which performs both functions of low-noise amplifier (LNA) and bandpass filter (BPF) is proposed for the application of 900-MHz RF front-end in wireless receivers. In the proposed amplifier, the positive-feedback Q-enhancement technique is used to overcome the low-gain low-Q characteristics of the CMOS tuned amplifier. The Miller-capacitance tuning scheme is used to compensate for the process variations of center frequency. Using the high-Q bandpass amplifier in the receivers, the conventional bulky off-chip filter is not required. An experimental chip fabricated by 0.8-/spl mu/m N-well double-poly-double-metal CMOS technology occupies 2.6/spl times/2.0 mm/sup 2/ chip area. Under a 3 V supply voltage, the measured quality factor is tunable between 2.2 and 44. When the quality factor is tuned at Q=30, the measured center frequency of the amplifier is tunable between 869-893 MHz with power gain 17 dB, noise figure 6.0 dB, output 1 dB compression point at -30 dBm, third-order input intercept point at -14 dBm, and power dissipation 78 mW.

Electronic tuned amplifiers exhibit seemingly noncausal behaviors such as negative group delays and superluminal group velocities. This is demonstrated with a simple tuned amplifier circuit which is analogous to the Lorentz model of the inverted atom. There is no contradiction with causality, rather it is shown that these behaviors are required by Bode's law, itself a consequence of causality.

Application of the PSpice program for analyzing HF high-power tuned amplifier (HFHPTA)is described in this paper. The new method is compared to other known methods. Calculation results of the balance of power and coefficient of efficiency, as well as the errors referred to catalogue vales are given for different methods of analysis.

The concept of “class E” was introduced by N. O. Sokal and A. D. Sokal, offering a new concept of high efficiency power amplifiers. The class E power amplifier is not defined by a special topology. The chosen circuit is a tuned amplifier, consisting of a single switch and a load network. The load network configuration consists of the shunt capacitance, series inductance, and series filter tuned to the fundamental frequency to provide a high level of harmonic suppression. This working class has the advantage of their design simplicity and high efficiency operation. Using the basic equations for class E amplifier, a user friendly graphic interface was implemented. This interface is a useful tool for simulations and design. Using this interface various waveforms from the circuit can be viewed so the real values of circuit components can be accurately estimated. Also the interface calculates the power efficiency, power consumption for different loads, etc. The power amplifier designed using this tool is used to generate plasma torch. In these torch is placed an earth sample using Argon gas as the transporter. A spectrometer is placed near plasma and is connected to a laptop. With this system is possible to detect the chemical composition of the earth sample. So, the entire system can be used in chemical determinations of the earth sample. The main advantage of this application consist in portability, efficiency and easy to use the system.

We report a compact, cost-effective tuned amplifier for frequency-selective amplification of the modulated signal in heterodyne detected nonlinear optical microscopy. Our method improved the signal to noise ratio by an order of magnitude compared to conventional lock-in detection, as demonstrated through stimulated Raman scattering imaging of live cells and tissues at the speed of 2 μsec/pixel. Application of the tuned amplifier to transient absorption microscopy is also demonstrated. The increased signal to noise ratio allowed epi-detected in vivo imaging of myelin and blood in rat spinal cord with high spatial resolution.

A possible application of personal computers for analyzing operating conditions of a HF high-power tuned amplifier is described in this paper. The algorithm and the program description are shown as well as the corresponding results. >

The concept of “class E” was introduced by N. O. Sokal and A. D. Sokal, offering a new concept of high efficiency power amplifiers. Class E power amplifier is not defined by a special topology. The chosen circuit is a tuned amplifier, consisting of a single switch and a load network. The load network configuration consists of the shunt capacitance, series inductance, and series filter tuned to the fundamental frequency to provide a high level of harmonic suppression. This working class have the advantage of their design simplicity and high efficiency operation. Using the basic equations for class E amplifier, a user friendly graphic interface was implemented. This interface is a usefull tool for simulations and design. We can see various waveforms from the circuit and she permit to estimate the real values of circuit components. Also the interface calculate the power efficiency, power consumption for different loads, etc.

This paper presents a systematic design methodology of millimeter wave (mm-wave) CMOS tuned amplifier which, for the first time to the best of authors' knowledge, takes the model inaccuracy at mm-wave frequencies into design consideration. Millimeter-wave models for both passive and active components are developed based on the standard foundry provided models with extra critical variation components which represent modeling uncertainties. The proposed model is verified through a comparison with the measured results of the test structures. The design methodology of tolerating the modeling uncertainties is demonstrated by a design example of a 65nm CMOS 57–64 GHz low noise amplifier, which has a 20 dB gain and a minimum 5 dB noise figure with 26 mA current consumption under 1 V supply.

Aiming at the high-frequency tuned amplifier circuit difficultly designed by traditional methods, Multisim 10 easily compared the simulation data and real data. The suitable components of the amplification were selected by parametric scanning analysis. Measuring the max output voltage got tuning capacitor of the frequency-selection. Emulation analysis was conducted for frequency, voltage gain and band-pass, indicating that accomplishing the multi-input small signal amplification and frequency selection. Analyzing load resistance and junction capacitance Cbc, proposed methods of high quality and stability. The results indicate that the design method is reasonable and performance indicators to meet the design requirements.

A study of chaotic circuits is of educational value, both to students and to practicing engineers. Ten circuits that behave chaotically are simulated with SPICE, starting with simple abstract systems and preceding, via familiar circuits such as the monostable and the tuned amplifier, to a controlled DC-DC power converter. The examples show a variety of ways in which chaos can arise in analog electronic circuits. It is shown how SPICE may be used to produce Poincare sections of strange attractors, and bifurcation diagrams. >

The purpose of this paper is to study the entire dimensioning space of a parallel-tuned integrated circuit that was designed and implemented earlier. The main parameters were swept while keeping the remaining component values fixed, and performance contours were derived. The main finding was that the traditional sweeps of resistively damped switching amplifiers match poorly if the resonator Q value is low - instead, the effect of external impedance matching circuit is very significant.

An infra-red spectrograph having sufficient flexibility to permit a wide variety of investigations is described. Its main characteristics follow. Any one of two prisms and two gratings, mounted on a table rotated by a large worm wheel, may readily be put into the path of the collimated radiation. A foreprism spectrometer is built into the instrument in such a way that it may be by-passed. The spectrograph case and the source housing are evacuable. Moving parts in the evacuated chamber are controlled through induction and Autosyn types of motors. This permits control, entirely electrical, from a semi-portable unit outside the spectrograph. The widths of the slits are automatically varied so that the output of the radiation detector thermocouple is approximately the same for all spectral regions if no absorbing material is in the path. The radiation detector is a rapid-response evaporated thermocouple whose output is amplified by a vacuum tube amplifier. A pulsating thermocouple output voltage is obtained by interrupting the radiation at the entrance slit by a rotating shutter. Shutters of metal, mica, and sodium chloride are used to minimize the effect of scattered radiation. To adjust the frequency of the shutter to match the sharply tuned amplifier, the rotational speed of the shutter disk is controlled through a synchronous motor driven by a variable-frequency power supply. A thyratron-operated calibration flasher is used to put reference lines on the photographically recorded spectra. The housing in which the Nernst glower is mounted is equipped with windows so that it may be divided into compartments to serve also as a vapor cell. This unit carries a mounting designed to locate a liquid cell precisely.

A frequency multiplication based LO phase shifting technique is presented for use in phased-array front end architectures operating in the ISM band at 24GHz. The presented architecture employs a two-stage phase shifter, a high-speed comparator and a Q-enhanced tuned amplifier to synthesize 18GHz tones from a 2GHz reference. The synthesized tones are used to injection lock 18GHz LC-oscillators in close proximity to the RF/mm-w front-ends in a phased-array system. A digital means for phase shift calibration is discussed. Implemented in IBM's 120 nm CMOS technology, the proposed architecture consumes 14.2mW from a 1.2V supply. The oscillator core consumes 3.7mW. The maximum phase shift errors at 18GHz is 5° and 0.79° before and after calibration, respectively.

Tez (Yüksek Lisans) -- İstanbul Teknik Üniversitesi, Fen Bilimleri Enstitüsü, 2010, Thesis (M.Sc.) -- İstanbul Technical University, Institute of Science and Technology, 2010, Bu çalışmada, akortlu kuvvetlendiricilerin tasarımı ve aktif endüktansın bu kuvvetlendiricide kullanımından söz edilmiştir. Öncelikle akortlu kuvvetlendiriciler hakkında temel teorik bilgiler verilmiş, tek katlı, çok katlı ve çift akortlu kuvvetlendirici tasarımlarından kısaca söz edilmiştir. Sonrasında, aktif endüktans tanımı ile beraber tasarlanacak akortlu kuvvetlendirici için uygun aktif endüktans nasıl seçilir sorusunun cevabı verilmiştir. Bunlara ek olarak, literatürdeki aktif endüktanslara atıfta bulunulurken, yukarıda söz edilen özellikler doğrultusunda kendi aralarında karşılaştırılmalar yapılmıştır. Sonrasında ise farksal ve kaskod geçiş iletkenliği kuvvetlendiricisi ile oluşturulan jiratör devresi önerilmiştir. Farksal geçiş iletkenliği kuvvetlendiricisi sayesinde endüktansa paralel gelen direnç arttırılmış olur. Önerilen devre, literatürde bulunan kaskod ve farksal aktif endüktanslara göre daha düşük self rezonansa sahip olsa da, daha yüksek kalite faktörüne sahip olmasından dolayı, akortlu kuvvetlendiriciler için tercih edilebilir bir jiratör haline gelmektedir. Bu aktif endüktans ile tasarlanan akortlu kuvvetlendiricilerin benzetim sonuçları çalışmaya eklenmiştir., In this work, the design of the tuned amplifiers and the use of active inductance in this kind of amplifiers are discussed. Initially the basic theoretical information about tuned amplifiers, such as the design of mono stage, multi stage and double tuned ones, is mentioned. Then, the definition of the gyrator and the answer of how to choose appropriate active inductance for the tuned amplifier that designed are given. Moreover, the tunability for changable frequency bands and consuming less power for mobile systems are some of the criterias to determine the proper active inductance. Additionally, the active inductance circuits given in scientific papers are referenced and they are compared with each other according to the properties discussed above. The high quality gyrator which is designed with differential and cascode transconductance is proposed in this work. Although, it has lower self resonance frequency with respect to cascode active inductance and differential active inductance, its higher quality factor makes it preferable for narrow band amplifiers. Finally, several tuned amplifiers designed with proper active inductance are also included., Yüksek Lisans, M.Sc.

A ninth subharmonic injection locking scheme is proposed for LO phase shifting based phased-array architectures operating in the ISM band at 24 GHz. The presented architecture employs a two stage phase shifter, a limiter and a Q-enhanced tuned amplifier to synthesize multiple phases of ninth-harmonic tones from a 2GHz reference at the destination and in close proximity to the RF/mm-w injection-locked oscillators operating at 18 GHz. A digital phase shift calibration technique is also discussed. The reported LO phase shifting and synthesis scheme is implemented in IBM's 120 nm CMOS technology and consumes a total of 11.8mW from a 1.2V supply. The oscillator core consumes a 3.7mW. The maximum phase shift error at 18 GHz is 4.29° and 0.42° before and after calibration, respectively.

An MMIC active band-pass filter is designed for the implementation of a tunable RF filter in a 0.35μm SiGe BiCMOS technology. This filter structure is proposed for operation in the S-band applications and BiCMOS MMICs applications for wireless personal communication. In simulations, the reasonably good performance was obtained. This filter is centered at 2.4GHz and has 30dB rejections @0.7-GHz offset from pass-band edges. These sharpened edges were caused by a tuned amplifier. The simulations show a frequency tuning range from 1.9GHz to 2.5GHz and a noise figure of 7.5–10 dB depending on center frequency. In addition, the design was optimized with artificial neural network (ANN). A feed-forward, four-layer Perceptron structure (MLP4) was used.