199 results on '"Toledano-Luque, M."'
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2. Scandium oxide deposited by high-pressure sputtering for memory devices: Physical and interfacial properties
3. Characterization of Individual Traps in High-κ Oxides
4. Statistical Distribution of Defect Parameters
5. Assessment of tunnel oxide and poly-Si channel traps in 3D SONOS memory before and after P/E cycling
6. Gate current random telegraph noise and single defect conduction
7. Statistical characterization of vertical poly-Si channel using charge pumping technique for 3D flash memory optimization
8. Analytical model for anomalous Positive Bias Temperature Instability in La-based HfO2 nFETs based on independent characterization of charging components
9. Superior reliability of high mobility (Si)Ge channel pMOSFETs
10. Anomalous thermal oxidation of gadolinium thin films deposited on silicon by high pressure sputtering
11. Temperature and voltage dependences of the capture and emission times of individual traps in high-k dielectrics
12. On the impact of the Si passivation layer thickness on the NBTI of nanoscaled Si 0.45Ge 0.55 pMOSFETs
13. Towards metal electrode interface scavenging of rare-earth scandates: A Sc 2O 3 and Gd 2O 3 study
14. Electrical characterization of high-pressure reactive sputtered ScO x films on silicon
15. Recent Trends in Bias Temperature Instability
16. Physical properties of high pressure reactively sputtered hafnium oxide
17. Applying complementary trap characterization technique to crystalline \gamma -phase- \hbox {Al}_{2} \hbox {O}_{3} for improved understanding of nonvolatile memory operation and reliability
18. Off-state TDDB in FinFET Technology and its Implication for Safe Operating Area
19. Statistical Distribution of Defect Parameters
20. Characterization of Individual Traps in High-κ Oxides
21. Charge pumping spectroscopy: HfSiON defect study after substrate hot electron injection
22. Mobility extraction using RFCV for 80 nm MOSFET with 1 nm EOT HfSiON/TiN
23. Hafnium oxide thin films deposited by high pressure reactive sputtering in atmosphere formed with different Ar/O 2 ratios
24. Self-heating characterization and its applications in technology development
25. Electrical Characterization of High-Pressure Reactive Sputtered Sc2O3 Films on Silicon
26. Reliability-Aware FinFET Design
27. Hot Carrier Reliability Improvement of Thicker Gate Oxide nFET Devices in Advanced FinFETs
28. Depth profile study of Ti implanted Si at very high doses.
29. Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacks.
30. High quality Ti-implanted Si layers above the Mott limit.
31. Scandium oxide deposited by high-pressure sputtering for memory devices: Physical and interfacial properties.
32. Laser thermal annealing effects on single crystal gallium phosphide.
33. Influence of interlayer trapping and detrapping mechanisms on the electrical characterization of hafnium oxide/silicon nitride stacks on silicon.
34. High-pressure reactively sputtered HfO2: Composition, morphology, and optical properties.
35. High-pressure reactively sputtered Hf[O.sub.2]: composition, morphology, and optical properties
36. Titanium doped silicon layers with very high concentration.
37. BTI reliability of advanced gate stacks for Beyond-Silicon devices: Challenges and opportunities
38. Optimization of inter-gate-dielectrics in hybrid float gate devices to reduce window instability during memory operations
39. As-grown donor-like traps in low-k dielectrics and their impact on intrinsic TDDB reliability
40. Laser thermal anneal of polysilicon channel to boost 3D memory performance
41. Maximizing reliable performance of advanced CMOS circuits—A case study
42. Analysis of performance/variability trade-off in Macaroni-type 3-D NAND memory
43. Statistical spectroscopy of switching traps in deeply scaled vertical poly-Si channel for 3D memories
44. Pulsed Laser Melting Effects on Single Crystal Gallium Phosphide
45. Experimental characterization of BTI defects
46. Direct tunneling and gate current fluctuations
47. (Invited) Multiphonon Processes as the Origin of Reliability Issues
48. Bias-temperature instability of Si and Si(Ge)-channel sub-1nm EOT p-MOS devices: Challenges and solutions
49. Understanding correlated drain and gate current fluctuations
50. Reduction of the BTI time-dependent variability in nanoscaled MOSFETs by body bias
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