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Over the last several decades, the increasing data traffic in telecom, datacom, and high-performance computing has led to multi-gigabytes-per-second data transmission speeds in multiservice switches (MSSs), such as core routers and cross-connect switches [1]. A particularly challenging problem in this regard is the transmission of high-speed electrical data through the backplane in MSSs due to the high attenuation of current backplane materials and the limited bandwidth of backplane connectors [2].

Optical transmitters for four-level pulse amplitude modulation (PAM-4) have attracted a significant amount of research in recent years, in large part due to the standardization of the format for the 200 and 400 Gigabit Ethernet optical interconnects in data centers. However, combining low-power and linear operation of the electro-optical frontend with sufficiently large bandwidths has proven challenging, especially for the 100 Gb/s/λ links (i.e., employing 50 Gbaud PAM-4). The most straightforward solution has been to deal with the non-idealities of the modulator in the electrical domain: predistorting the signal levels and/or equalizing the frequency response with the help of digital signal processing (DSP). However, this typically requires fast digital-to-analog converters (DACs), either capable of delivering large swings (> 1 Vpp) or supplemented with an additional linear amplifier to drive the optical modulator. Both options substantially increase the power consumption and the complexity of the transceiver. Rather than allocating effort to linearize the electrical to optical conversion of a single modulator, we propose a topology that performs the DAC operation in the optical domain. Two compact electro-absorption modulators in an interferometer layout are driven with NRZ data to generate the four-level signal in the optical domain. Using this topology, we demonstrate the first real-time 128 Gb/s PAM-4 transmission with a silicon photonic transmitter in a chip-to-chip link. In a back-to-back setup, we obtained a bit-error ratio (BER) of 4 × 10−10 without requiring any DAC, DSP, or modulators with large traveling wave structures. Over 1 km of standard single mode fiber a BER of 8 × 10−6 is recorded, still well below the KP4 forward error-coding limit. These results correspond to the lowest BERs reported for any real-time PAM-4 link at 100 Gb/s or higher, illustrating the benefit of performing the DAC operation in the optical domain.

We demonstrate and analyze 50 Gb/s non-return-to-zero (NRZ) transmission over 15 km of standard single-mode fiber (SSMF), 60-Gb/s NRZ transmission over 5 km of SSMF and up to 64-Gb/s NRZ back-to-back using a directly modulated short-cavity long-wavelength single-mode vertical-cavity surface-emitting laser (VCSEL) emitting at 1326 nm. Owing to an analog 6-tap transmit feedforward equalizer, the link can operate without digital signal processing. In all three cases, real-time bit error ratio measurements below the 7% overhead hard-decision forward error correction threshold are demonstrated when transmitting a pseudo-random bit sequence with a period of $2^7-1$ bits. In addition, we analyze the interplay between the residual fiber chromatic dispersion at the operating wavelength of the VCSEL and the chirp due to direct modulation. These results demonstrate how O-band, short-cavity long-wavelength single-mode VCSELs can be used in intradata center networks, as well as in interdata center networks at reaches below 15 km.

The ever-increasing demand for more efficient data communication calls for new, advanced techniques for high speed serial communication. Although newly developed systems are setting records, off-line determination of the optimal equalizer settings is often needed. Well-known adaptive algorithms are mainly applied for receive-side equalization. However, transmit-side equalization is desirable for its reduced linearity requirements. In this paper, an adaptive sign-sign least mean square equalizer algorithm is developed applicable for an analog transmit-side feed-forward equalizer (FFE) capable of transforming non-return-to-zero modulation to duobinary (DB) modulation at the output of the channel. In addition to the derivation of the update strategy, extra algorithms are developed to cope with the difficult transmit-receive synchronization. Using an analog six tap bit-spaced equalizer, the algorithm is capable of optimizing DB communication of 100Gb/s over 1.5-m Twin-Ax cable. Both simulations and experimental results are presented to prove the capabilities of the algorithm demonstrating automated determination of FFE parameters, such that error-free communication is obtained (BER

Electrical duobinary modulation is considered as a promising way to realize high capacity because of the low bandwidth requirement on the optical/electrical components and high tolerance toward chromatic dispersion. In this paper, we demonstrate a 100 Gb/s electrical duobinary transmission over 2 km standard single-mode fiber reaching a bit error rate under 7% HD-FEC threshold with the use of PRBS7. This link is tested in real-time without any form of digital signal processing. In-house developed SiGe BiCMOS transmitter and receiver ICs are used to drive an electroabsorption modulated laser and decode the received signal from a PIN-photodiode. The performance of 50 and 70 Gb/s nonreturn-to-zero and electrical duobinary transmission are investigated for comparison.

The effect of a sharp return bend on the two-phase flow frictional pressure drop close up-and downstream of the bend is investigated. The measurements are performed for refrigerant R134a at mass fluxes ranging from 200 to 500 kg/m 2 s. Four bend geometries are tested, with inner channel diameters ranging from 4.93 mm to 8.1 mm and the curvature ratio between 2.55 and 4.43. For both up-and downward oriented flow the main bend effect on the frictional pressure drop is observed close downstream of the return bend. However, for downward oriented flow a decrease in pressure drop is observed and for upward flow an increase is found. To assess the effect the underlying flow behaviour, the void fraction time trace is analysed. The average void fraction and wavelet variance of the void fraction signal can be used to explain the trends in the frictional pressure drop. The correlation between the frictional pressure drop and the flow behaviour indicators is investigated quantitatively for the different geometries.

In this work, the two-phase flow frictional pressure drop of a refrigerant flow up- and downstream of a sharp return bend is studied. The radius of the return bend is 10.2 mm and the channel inner diameter measures 8 mm. The refrigerant is R134a, the mass flux is varied between 200 and 500 kg/m2 s and the vapour quality x is varied between 0 and 1. The bend orientation is vertical. Upward flow as well as downward flow through the bend is studied. To be able to explain the effect of the return bend on the frictional pressure drop, the two-phase flow behaviour is measured at several locations up- and downstream of the return bend by means of a capacitance sensor. From this capacitance signal, the void fraction and wavelet variance are derived. Close downstream of the return bend the measured pressure gradient is lower than the reference for downward oriented flow. At these locations the void fraction is higher compared to the reference and the wavelet variance is lower compared to the reference measurement, which is consistent with a lower pressure gradient. For upward oriented flow an increase in pressure gradient compared to the reference measurement is observed close downstream of the return bend. At these locations an increase in wavelet variance compared to the reference is observed, which is consistent with the increase in frictional pressure gradient. Upstream the affected length is rather small, less than 10 diameters upstream, downstream the bend effect is more pronounced and present for more than 30 diameters.

In this work, a new method is proposed to determine the two-phase flow regime based on the capacitance trace of the flow. The experimental data set contains 123 capacitance traces measured for a horizontal tube with an inner diameter of 8 mm. The tested refrigerant is R134a. The mass flux is varied between 200 and 500 kg/m 2 s and the vapour quality x is varied between 0 and 1. For each capacitance signal the wavelet variance is estimated based on the maximum overlap wavelet transform of the signal. The used wavelet function is a D8 wavelet of the Daubechies family. A feature space is generated based on the wavelet variance values associated with frequencies below 100 Hz. Principal component analysis and linear discriminant analysis are subsequently applied to this raw feature space, after which the Fuzzy c-means clustering algorithm is used to divide the feature space into clusters corresponding to different flow regimes. The resulting flow regime assignment shows a good agreement with a visual classification of the data set based on flow visualisations. Finally, the classification was performed based on variable training data to show the robustness of the method.

Four-level pulse amplitude modulation (PAM-4) is widely regarded as the modulation format of choice for the next generation of 400 gigabit Ethernet short-reach optical transceiver. However, generating and receiving PAM-4 at line rates of 112 Gb/s has proven challenging, without relying on power-hungry tools as digital signal processing and digital-to-analog converters, as it requires linearity from the E/O-components in the link and/or predistortion techniques. Moving the binary to multilevel conversion to the optical domain would greatly relax these requirements. Electroabsorption-based transceivers would be ideally suited for this type of data center interconnects as they are capable of combining low-power and high bandwidth operation with a very compact layout, removing the need for large travelling wave structures and dedicated 50 Ω terminations. In this paper, we present a novel transmitter topology for generating PAM-4 using two binary-driven electroabsorption modulators in parallel. Using this approach, we achieve superior performance with respect to a single, but identical multilevel-driven EAM. Finally, we demonstrate the first silicon-based modulator capable of transmitting single-lane 112 Gb/s PAM-4 over 2 km of standard single-mode fiber without any electrical digital-to-analog converter, DSP, or long transmission line structures and terminations.

Using two $120\ \mu m$ long, binary driven GeSi electro-absorption modulators in parallel and an in-house developed electrical transceiver chipset, we demonstrate the first real-time transmission of 128 Gb/s PAM-4 over 1 km fiber without requiring any DSP or DAC/ADC.

We demonstrate DSP-free and real-time NRZ transmission at 50Gb/s over 15km SSMF, 60Gb/s over 5km SSMF and 64Gb/s back-to-back using a directly modulated 1326nm short cavity VCSEL supported by a SiGe BiCMOS 6-tap feedforward equalizer.

A power amplifier (PA) with a saturated output power of 24.1 dBm at 32 GHz, fabricated in a 250 nm SiGe BiCMOS technology, is presented. This PA operates in Class AB and achieves a power-added efficiency (PAE) of 7.2% with a gain of approximately 25 dB and a die area of 1.70 mm2. A differential cascode output stage with a self-shielded balun is used, allowing to maximize the output voltage swing. The driver stage consists of translinear loops to bias and linearize the output stage while a transformer-type power combiner is implemented to achieve broadband on-chip power combination. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:718–722, 2015

A BiCMOS chip-based real-time intensity modulation/direct detection spatial division multiplexing system is experimentally demonstrated for both optical interconnects. 100 Gbps/lambda/core electrical duobinary (EDB) transmission over 1 km 7-core multicore fiber (MCF) is carried out, achieving KP4 forward error correction (FEC) limit (BER < 2E-4). Using optical dispersion compensation, 7 x 100 Gbps/lambda/core transmission of both non-retunito-zero (NRZ) and EDB signals over 10 km MCF transmission is achieved with BER lower than 7% overhead hard-decision FEC limit (BER < 3.8E-3). The integrated low complexity transceiver IC and analog signal processing approach make such a system highly attractive for the high-speed intra-datacenter interconnects. (C) 2018 Optical Society of America under the terms oldie OSA open Access Publishing Agreement.

Increasing line rates beyond 56Gb/s is a big challenge for transceiver front-ends. We discuss recent developments towards 100Gb/s copper, +56Gb/s multi-channel single-mode VCSEL links and segmented MZM drivers for advanced modulation.

We report the first 25Gb/s 3-level modulated BM-RX employing a ¼-rate linear BM APD-TIA and a custom decoder IC. We successfully demonstrated burst-mode sensitivity of -20.4dBm with 18dB dynamic burst-to-burst for 25Gb/s upstream links.

High-speed interconnects in data-center and campus-area networks crucially rely on efficient and technically simple transmission techniques that use intensity modulation and direct detection (IM/DD) to bridge distances of up to a few kilometers. This requires electro-optic modulators that combine low operation voltages with large modulation bandwidth and that can be operated at high symbol rates using integrated drive circuits. Here we explore the potential of silicon-organic hybrid (SOH) Mach-Zehnder modulators (MZM) for generating high-speed IM/DD signals at line rates of up to 120 Gbit/s. Using a SiGe BiCMOS signal-conditioning chip, we demonstrate that intensity-modulated duobinary (IDB) signaling allows to efficiently use the electrical bandwidth, thereby enabling line rates of up to 100 Gbit/s at bit error ratios (BER) of 8.5 x 10(-5). This is the highest data rate achieved so far using a silicon-based MZM in combination with a dedicated signal-conditioning integrated circuit (IC). We further show four-level pulse-amplitude modulation (PAM4) at lines rates of up to 120 Gbit/s (BER = 3.2 x 10(-3)) using a high-speed arbitrary-waveform generator and a 0.5 mm long MZM. This is the highest data rate hitherto achieved with a sub-millimeter MZM on the silicon photonic platform. (C) 2017 Optical Society of America

In this paper a high gain, high power output stage designed in a 250nm SiGe BiCMOS technology is presented. The used topology together with a discussion on the stability of the output stage is explained in detail. In order to increase the gain of the output stage and thus increases the attainable power added efficiency (PAE), positive feedback is used. Furthermore a formula predicting the input impedance of a common base transistor at high frequencies is deducted which explains and predicts the magnitude of the feedback mechanism. The output stage achieves a peak gain of 14.4dB at 31GHz with a maximum output power of 22dBm.

This paper presents the frequency domain characterization of very high bandwidth connectorized traces and a millimeter wave rat race coupler. These connectorized differential grounded coplanar waveguide traces, essential for the testability of high speed integrated circuits, have a measured flat frequency response up to 67 GHz which indicates correct connector footprint and transmission line design. The differential traces narrow down to a chip scale pitch of 150 μm allowing direct flip chip connections. This enabling the testing of millimeter wave integrated circuits without the need for probing. Furthermore, a 50 GHz rat race coupler was fabricated to generate a differential clock from a single ended clock source.

We present single-lane 100-Gb/s NRZ, electrical duobinary and PAM-4 transmitters using silicon photonics GeSi electro-absorption modulators. No DSP, DAC or traveling-wave structures are required, enabling compact and low-power transceivers for data center interconnects.

A BiCMOS chip-based real-time IM/DD spatial division multiplexing system is experimentally demonstrated for short-reach communications. 100 Gbps/λ/core NRZ and EDB transmission is achieved below 7%-overhead HD-FEC limit after 10km 7-core fiber with optical dispersion compensation.