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We implemented a hydrogen annealing based post-processing technique as a tool to improve the sidewall roughness of 3 μm thick silicon-on-insulator (SOI) waveguides and demonstrated ultra-high- Q factors on racetrack resonators leveraging on the propagation loss reduction achieved through the smoothing process. The designed racetracks are based on a combination of rib waveguides and strip-waveguide-based Euler bends. We measured intrinsic quality factors of 14×10^6 for a racetrack with a footprint of ∼5.5 mm^2 and 10.7×10^6 for a smaller racetrack with footprint of ∼1.48 mm^2 . The estimated propagation loss for the rib waveguides was ∼2.7 dB/m, representing a ×3 reduction respect to the previously measured losses of 3 μm thick SOI rib waveguides treated with thermal oxidation smoothing. Overall, the post-processing technique allowed to significantly reduce the sidewall roughness without altering the geometry of the waveguides, unlike in sub-micron scale SOI platforms, making it an attractive solution for applications demanding ultra-low losses.

We show theoretically and experimentally how a flat-top second-order response can be achieved with a self-coupled single add-drop ring resonator based on two couplers with different splitting ratios. The resulting device is a 1x1 filter, reflecting light back in the input waveguide at resonating wavelengths in the passbands, and transmitting light in the output waveguide at all other non-resonating wavelengths. Different implementations of the filter have been designed and fabricated on a micron-scale silicon photonics platform. They are based on compact Euler bends - either U-bends or L-bends - and Multi-Mode Interferometers as splitters for the ring resonators. Different finesse values have been achieved by using either 50:50 MMIs in conjunction with 85:15 MMIs or 85:15 MMIs in conjunction with 95:05 double MMIs. Unlike ordinary lowest order directional couplers, the MMIs couple most of the power in the cross-port which make them particularly suitable for the topology of the self-coupled ring, which would otherwise require a waveguide crossing. Experimental results are presented, showing good agreement with simulations. The proposed devices can find applications as wavelength-selective reflectors for relatively broad-band lasers or used as 2x2 add-drop filters when two exact replicas of the device are placed on the arms of a Mach-Zehnder interferometer., 9 pages, 17 references, 12 figures

This article presents the design, fabrication, and characterization of edge-coupled 1D optical phased arrays (OPAs) combined with collimating lenses. Our concept was tested with two OPAs having different collimation ranges. Both OPA designs have 3-μm waveguide spacing and the maximum beam steering range is about 30° based on wavelength tuning around 1550 nm. The first generation had 37 channels with 108 μm of waveguide array width and the second generation had 512 channels with 1.5 mm array width. As the array outputs are edge coupled, suitable lenses are required to collimate the beam vertically. We report the comparison between a commercially available straight cylindrical lens and custom 3D printed curved cylindrical lenses. In the experiments, we demonstrate 1D beam steering of the light outcoupled from the waveguide facets and collimated by these lenses and analyzed parameters such as Rayleigh range and beam divergence. These parameters are estimated to be 9.9 mm and 7.0 mrad (0.4°), respectively, for the commercial lens, whereas 40.1 mm and 3.5 mrad (0.2°) for the dedicated 3D printed lens, showing a clear improvement.

We have systematically studied multimode interferometer (MMI) splitters made from multiple tapered sections. The goal is to create a library of robust and low-loss splitters covering all splitting ratios (SR) for our silicon photonics platform based on 3 $\mu$m thick waveguides. The starting point is always a non-tapered canonical MMI either with general symmetry (canonical SRs 50:50, 100:0, and reciprocal ratios), with mirror symmetric restricted symmetry (canonical SRs 85:15, 50:50, 100:0, and reciprocal ratios), and with point-symmetric restricted symmetry (canonical SRs 72:28 and 28:72). Splitters of these three types are then divided into one to four subsections of equal length, leading to 12 possible different configurations. In each of these subsections, the width is first linearly tapered either up or down and then tapered back to its starting value ensuring mirror symmetry. For all twelve configurations, we carried out an extensive campaign of numerical simulations. For each given width change, we scanned the splitter length and calculated the power in the fundamental mode at the output as well as its relative phase. We then selected the designs with sufficiently low loss and mapped their SR as a function of either the change in width change or length, therefore creating systematic maps for the design of MMI splitters with any SR. Eventually, we selected and fabricated a subset of designs with SRs ranging from 5:95 to 95:5 in steps of 5% and validated their operation through optical measurements., Comment: 4 pages, 4 figures, 13 references

We have designed and fabricated micro-LiDAR chips based on 1D optical phased arrays (OPAs) that collimate light in the horizontal direction only. Thus, a cylindrical lens is needed for the vertical collimation. A part of the work demonstrates the analysis of 1D beam steering experiments through the direct outcoupling from the waveguide facets with two straight cylindrical lenses available commercially and a detailed analysis based on the parameters like Rayleigh range and beam divergence is presented. This work also demonstrates the characterizations of 3D printed curved cylindrical collimating lenses. A thorough analysis based on the experimental work resulted in certain suggestions to improve the collimation and to perform the beam steering in a better way.

Silicon photonics is the most promising technology for applications ranging from large-bandwidth, low power consumption datacom transceivers, to wearable health monitoring devices, or optical data-bus for quantum processors. To bring silicon PIC based products to the market, ultra-low loss waveguides would be preferred. In the conventional submicron silicon platforms, higher propagation loss (in the order of ∼1 dB/cm) induced by the roughness of the etched sidewalls, as well as higher fiber-to-waveguide coupling loss due to its sub-micron dimensions impose challenges for its deployment in many products. VTT's thick-SOI technology offers a promising alternative, owing to its lower propagation loss (∼0.1 dB/cm), reduced polarization sensitivity, and capacity to handle higher optical power without exciting nonlinear losses. Its micron-scale cross-section enables efficient edge coupling. Exploiting its ultra-low loss, we have demonstrated unprecedented level of integration such as, a 40-channel array waveguide grating (AWG) based mux/de-mux, or a Faraday rotator based on silicon spirals, without employing any magneto-optic material. Now we reduced the propagation loss further, down to record-low 4 dB/m, by controlled annealing of waveguides in 100% pure H2 environment. In our optimized, MPW-compatible annealing process, the atomic mobility of Si smoothens the scallops from etching, without causing any structural deformation of the waveguides. This substantially reduced loss enabled us to develop ultra-high Q ring resonators on our thick-SOI platform, as well as sidewall smoothening for the active components, thereby making our platform a bedrock for the emerging applications such as, quantum computing, biosensors, and 3D imaging.

VTT micron-scale silicon photonics platform can play a significant role in the second quantum revolution, supporting not only quantum photonics but also solid-state quantum systems. Quantum photonics can benefit from the unique properties of the platform, a distinctive example application being quantum key distribution, where we are developing receivers to support its large-scale deployment. On the other hand, we are using our photonic integration technology also to aid scaling-up superconducting quantum computers, by controlling and reading the qubits in the cryostat through classical optical links. I will cover all these developments showing our recent results, ongoing activities, and future plans.

An example of continue breakthrough in Silicon Photonics (SiPh) is heterogeneous integration of active devices at wafer level not just to overcome the natural band-gap limit of the Silicon, but more importantly to exploit its high level of integration, significantly reducing packaging costs while driving down the cost of optical communications. In this paper, we describe a powerful combination and coupling of integrated 45°up-reflecting mirrors with longwavelength InP vertical cavity surface emitting lasers (VCSELs) used to develop a TX module with aggregated capacity up to 2-Tb/s capacity. The Photonic Integrated Circuit (PIC) designed and developed under the H2020 research project PASSION, heterogeneously embeds 40 VCSELs covering the C band on a single 3μm -thick Silicon-On-Insulator (SOI) multiplexer chip. The PIC exit-waveguide is also terminated with an up-reflective mirror and coupled with a fiber optic- based periscope, minimizing the form-factor while improving mechanical reliability of the overall packaged module. VCSELs are directly modulated with Discrete Multi-Tone (DMT) modulation format allowing 50 Gb/s rate per VCSEL. The PIC dimension is about 20 x 20 sqmm and power consumption < 5 pJ/bit at 2Tb/s. A Land Grid Array (LGA) interposer hosting the PIC sorrounded by 40 (flip-chip bonded) linear VCSEL drivers, providing electrical and thermal decoupling to the PIC is also described, achieving a compact and a thermally efficient packaging solution. Conveniently, a modular approach is pursued using the same identical 2-Tb/s TX module when building up a supermodule enabling an aggregating capacity up to 16 Tb/s on a single polarization state.

Purpose In this prospective study, we aim to determine surgical outcomes in patients with lumbar spinal stenosis (LSS) 10 years after surgery. Methods The study population consisted of 96 LSS patients who underwent decompressive surgery, 72 of whom participated in the 10-year follow-up. The patients completed a questionnaire preoperatively and 3 months, 5 years, and 10 years postoperatively. Outcome measures were satisfaction with the surgical outcomes, the Oswestry Disability Index (ODI), the visual analog scale (VAS), the numeric rating scale (NRS-11), and walking ability quantified in meters. Postoperative improvements at 5 and 10 years were analyzed using linear mixed models. Furthermore, comparisons between postoperative time points were made for clinical courses of pain, disability, and walking ability. Results At the 10-year follow-up, 68% of the patients were satisfied with the surgical outcomes. All the measured outcomes showed statistically significant improvement from baseline to the 5- and 10-year follow-up. The mean VAS score was 9.8 mm higher at the 5-year follow-up and 7.8 mm at the 10-year follow-up compared to the 3-month follow-up point. Similarly, the mean ODI was 4.8% higher at the 10-year follow-up compared to the 3-month follow-up point. Conclusion This study reports the clinical course of pain, disability, and walking distance after LSS surgery with the 10-year follow-up. Based on our study results, patients with LSS could expect to have positive effects of their back surgery up to 10 years. However, minor worsening in pain and disability may occur and one-fourth of the patients may need a reoperation during the 10-year follow-up period.

Photonic integrated circuits (PICs) are expected to play a significant role in the ongoing second quantum revolution, thanks to their stability and scalability. Still, major upgrades are needed for available PIC platforms to meet the demanding requirements of quantum devices. In this paper, we present a review of our recent progress in upgrading an unconventional silicon photonics platform towards such goal, including ultra-low propagation losses, low fibre coupling losses, integration of superconducting elements, Faraday rotators, fast and efficient detectors, as well as phase modulators with low loss and/or low energy consumption. We show the relevance of our developments and of our vision in two main applications: quantum key distribution - to achieve significantly higher key rates and large-scale deployment - and cryogenic quantum computers - to replace electrical connections to the cryostat with optical fibres., 24 pages, 14 figures, 159 references

Our ultra-low-loss silicon photonics platform can play a significant role in the second quantum revolution, supporting not only quantum photonics (e.g., quantum communication) but also solid-state quantum systems (e.g., scaling superconducting quantum computers).

Photonic integrated wavelength selective switches are integral part of Reconfigurable add/drop multiplexer nodes and enable efficient utilization of resources in high-capacity metro networks. Photonic integrated wavelength selective switches play instrumental role in enabling dynamic reconfigurability and support efficient utilization of network resources. In this paper, design, and implementation of modular photonic integrated wavelength selective switches across integration platforms is presented. The modularity feature of the photonic integrated circuits (PIC) supports scalability for meeting the capacity requirement of the network. An experimental demonstration on a proof-of-concept SiPh/InP hybrid integrated wavelength selective switches is given. Results further verify the prospect of modular PIC implementation of WSS in fulfilling the dynamic re-configurability demand of high-capacity metro network.

Recent progress in developing tunable mid-IR (2.6 um range) integrated hybrid lasers, are demonstrated. the hybrid laser includes gain chips based on AlGaInAsSb/GaSb quantum wells and tunable reflectors based on micron-scale silicon on insulator integrated photonics platform. The devices exhibit milliwatt-level average power, 10 mW of peak powers and tuning ranges up to 60 nm. Factors limiting tuning range, spectral purity and maximum power are discussed. The demonstrated platform enables realization of tunable lasers for a wide range of applications requiring high performance light sources with emission wavelengths from 1.8 µm to 3 µm and beyond.

We present polarization splitters for micron-scale silicon photonics based on Mach-Zehnder interferometers (MZI). We have designed the polarization splitters based on an advanced transfer matrix model, then confirmed by numerical simulations. We have fabricated the devices on our 3 µm-thick silicon on insulator (SOI) platform and successfully measured polarization splitting over a wide wavelength range (1450-1650 nm). We have achieved an extinction ratio (ER) >14dB for both polarizations on a bandwidth of 35 nm. However, high ER upto 20 dB is observed when considering one polarization.

The polymer waveguide taper structures are designed for interfacing 3 μm silicon-on-insulator (SOI) devices to standard single mode SM fiber. The structure consists of polymer waveguide with its optical facets compatible with the modes of single-mode (SM) fiber and silicon waveguide. Simulations suggest that the coupling efficiency of -0.63 dB from the SM fiber to 3 μm strip waveguide can be achieved. We show experimentally the transmission loss of 0.6 dB/cm in polymer waveguide and coupling loss of 0.7 dB from the SM fiber to 2.1 μm polymer waveguide.

VTT's 3 μm SOI platform with record low propagation loss (0.1 dB/cm for fundamental mode), as well as polarization insensitivity, offers a rich portfolio of efficient passive and active components. With a view to extend the component toolbox by monolithically integrating high-speed plasmonic modulators, we have developed an a-Si:H based waveguide escalator to take out light from highly confined thick-SOI passives to the top layer where active materials are monolithically integrated. Using the compact escalator, monolithic integration of various high-speed active components on the 3 μm SOI platform are proposed.

The length variation associated with standard cleaving of III–V optoelectronic chips is a major source of loss in the integration with the micron-scale silicon-on-insulator waveguides. To this end, a new, to the best of our knowledge, approach for precise definition of the III–V chip length is reported. The method employs lithography and wet etching of cleave marks outside the active III–V waveguides. The marks follow a specific crystallographic orientation and are used to initiate and guide the cleaving process. Besides minimizing the air gap between the butt-coupled III–V and Si waveguides and hence minimizing the coupling losses, the use of precisely defined length significantly improves the integration yield owing to the increased length uniformity. We apply this technique to defining the lengths of GaAs-based semiconductor optical amplifiers and demonstrate length control with an accuracy better than 250 nm per facet. This variation is more than 1 order of magnitude smaller than with the traditional cleaving methods, resulting in improvement of coupling by several dBs. acceptedVersion

STUDY DESIGN A prospective observational 10-year follow-up study. OBJECTIVE This study aimed to examine preoperative predictors for better surgical outcomes in patients with lumbar spinal stenosis (LSS) 10 years after surgery. SUMMARY OF BACKGROUND DATA LSS is a leading cause of low back surgery in patients older than 65 years. Limited data are available for predictors of long-term surgical outcomes in patients with LSS. METHODS At the baseline, 102 patients with LSS underwent decompressive surgery, and 72 of the original study sample participated in a 10-year follow-up study. Study patients filled out a questionnaire preoperatively, and follow-up data were collected at 3 months, 6 months, 1 year, 2 years, 5 years, and 10 years postoperatively. Surgical outcomes were evaluated in terms of disability with the Oswestry Disability Index (ODI) and pain with the visual analog scale (VAS). Predictors in the models were nonsmoking status, absence of previous lumbar surgery, self-rated health, regular use of painkillers for symptom alleviation, and BMI. Statistical analyses included longitudinal associations, subgroup analyses, and cross-sectional analyses. RESULTS Using multivariate analysis, statistically significant predictors for lower ODI and VAS scores at 10 years were nonsmoking status, absence of previous lumbar surgery, better self-rated health, and regular use of painkillers for

This paper presents our recent progress on fast germanium photodetector (PD) development for our 3μm silicon-on - insulator (SOI) platform. We have fabricated a horizontal PIN photodiode, which has a 3dB cutoff frequency of 40GHz and responsivity of 1.0 A/W at -1V bias for operation wavelength of 1.55μm. The high bandwidth indicates that the detector speed is limited by the transit time of the carriers over the i-region rather than the junction capacitance. The electric field in the i-region at -1V is high enough to maintain the carrier drift speed close to the maximum velocity of carriers in the Ge. The device is realized using selectively grown germanium with very low amount of stress induced crystal defects. The detector area and the Si waveguides were patterned with a common hard mask, which enables accurate lateral alignment between them. The n- and p-contacts were directly made on the Ge using Ti/Al metallization. The vertical sidewalls of the detector area were implanted in order to create the horizontal PIN structure. The subsequent dopant diffusion was estimated to secure the i-region and the junctions by controlling the thermal budget, as the two dopants have different diffusion mechanism in Ge. One of the advantages of our micron scale waveguides is that due to the high confinement of the optical mode within the Si waveguide they allow light coupling into a short detector. The junction capacitances are therefore small as the detector area is only 1x9μm. In addition, the electrical output pulse shape is not distorted by the slow diffusion current of electrons and holes as the incoming light do not overlap the doped n- and n-regions.

Ge photodiodes were integrated on the 3 µm SOI platform, where the 3 µm thick Si waveguides offer ultra-low propagation losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and the ability to tolerate relatively high optical powers (>1W). A horizontal Ge PIN photodiode was monolithically integrated on the 3 µm SOI platform. It reached a 3 dB cutoff frequency of 40 GHz and 1.0 A/W responsivity at -1 V bias and 1.55 µm wavelength. Germanium was selectively grown into cavities in the 3 µm SOI layer and the Ge waveguide detector was patterned with the same hard mask with the Si waveguides to achieve waveguide self-alignment. The development of 40 GHz PDs was an important step in improving the feasibility of the 3 µm SOI platform in high-bandwidth applications.

We demonstrate experimentally an optical switch architecture that employs $\mu \text{m}$ -silicon-on-insulator (SOI)-based circuitry for both buffering and routing purposes and operates with 10-Gb/s optical packets in both uni- and multi-cast switching forwarding modes. It comprises a hybrid broadcast-and-select (BS)/wavelength-routed architecture, with the BS layout being responsible for identifying the desired cluster of outgoing ports, while the wavelength-routed switch part forwards then the data to the specific outgoing port. Contention resolution at the BS switch part is offered through an $\mu \text{m}$ -SOI integrated optical delay line bank and wavelength-routing is realized by means of a $\mu \text{m}$ -SOI $3\times 3$ echelle grating router, while semiconductor optical amplifier Mach-Zehnder interferometers are employed for wavelength conversion purposes. The switch architecture has been experimentally validated with 10-Gb/s optical data packets for both uni- and multicasting operation, revealing error-free performance with

We demonstrate integrated silicon-on-insulator (SOI) spiral waveguides with record-high 2.6-ns/mm2 on-chip delay efficiency performing as delay bank stage in variable optical delay buffering and time-slot interchanger applications with 10-Gb/s optical packets. The micro-scale SOI chip comprises three integrated waveguide delay elements of different lengths, providing variable delays of 6.5, 11.3, and 17.2 ns, respectively. Utilizing two semiconductor optical amplifier Mach-Zehnder interferometer wavelength converters and on-chip packet delay, error-free on-chip variable delay buffering from 6.5 to 17.2 ns and successful time-slot interchanging for 10-Gb/s optical packets are presented.

NORTH is a small-sized tokamak located at the Technical University of Denmark. It can be operated both as a spherical tokamak and a simple magnetized torus (SMT). Here we show first experimental results. We discuss the setup of the device, including the layout of the vacuum vessel, the magnetic field coils, the power supply systems, the heating sources, diagnostics, and the control system. We present measurements in discharges that have been heated by electron cyclotron resonance heating at the fundamental resonance. The waves have been injected both from the low-field side and the high-field side, and rich fluctuation spectra in Langmuir probe and Rogowski coil signals are presented during the different plasma phases. Finally, we discuss research plans and further installations to be made on NORTH.

Offering open-access silicon photonics-based technologies has played a pivotal role in unleashing this technology from research laboratories to industry. Fabless enterprises rely on the open-access of these technologies for their product development. In the last decade, a diverse set of open-access technologies with medium and high technology readiness levels have emerged. This paper provides a review of the open-access silicon and silicon nitride photonic IC technologies offered by the pilot lines of European research institutes and companies. The paper also highlights upcoming features of these platforms and discusses how they address the long-term market needs.

We present a U-bend design for traveling wave III-V gain devices, such as semiconductor optical amplifiers and laser diodes. The design greatly simplifies the butt-coupling between the III-V chip and silicon-on-insulator photonic circuit by bringing the I/O ports on one facet. This removes the need for precise dimension control otherwise required for 2-side coupling, therefore increasing the yield of mounted devices towards 100%. The design, fabrication and characterization of the U-bend device based on Euler bend geometry is presented. The losses for a bend with a minimum bending radius of 83 μm are 1.1 dB. In addition, we present an analysis comparing the yield and coupling losses of the traditionally cleaved devices with the results that the Euler bend approach enable, with the final conclusion that the yield is improved by several times while the losses are decreased by several dB.

High speed back-to-back transmission of NRZ data at 12.5 Gbit/s was achieved over a repeaterless optical network without the use of forward error correction or optical clock recovery using a hybrid integrated silicon photonics optical interconnect. The interconnect comprises an electroabsorption modulator based on dilute nitride multiple quantum well material on GaAs substrate optically coupled to large core silicon waveguide using passive alignment and flip-chip bonding.

We report a traveling-wave GaAs-based semiconductor optical amplifier operating at $1.3\ \mu m$ with a $U$ -bend waveguide bringing the I/O ports on the same side of the chip. This architecture significantly simplifies hybrid integration and coupling to silicon-on-insulator waveguides.

Silicon photonics offers the possibility to integrate a large number of photonic components on a small Si chip in a similar fashion as microelectronic circuits have been realized for many decades. This enables low power consumption, small footprint and low-cost mass production. Application areas for Si photonics reach from optical communication and computing to optical sensing and imaging. Monolithic germanium PIN detectors are one of the key components in photonic integrated circuits (PICs) and convert light into electrical signals. Germanium is the preferred material for photodetectors in silicon photonics as it absorbs light in the datacom and telecom wavelength range (1.2-1.7 μm) due to its small bandgap. Germanium is also tolerated in the IC-clean manufacturing lines, unlike many other potential semiconductor materials. Electron and hole mobilities in germanium are high, enabling high-bandwidth detectors. Challenges in Ge integration on silicon-on-insulator (SOI) wafers include unintentional oxidization and etching in many of the standard silicon technology processing steps, fast diffusion of n-type dopants in Ge and relatively large lattice mismatch between Ge and Si. High refractive index contrast between silicon (3.5) and silicon dioxide (1.5) is the key to achieve ultra-dense photonics integration. Most of the silicon photonics research is carried out using submicron-thick SOI waveguides and latest microelectronics fabrication technologies that involve (and require) very small wafer topography. In this paper, we present Ge photodiode integration on a 3 µm SOI platform with 3 µm thick Si waveguides. Those offer ultra-low propagation losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1W). One major limitation on the 3 µm SOI platform has been the lack of as fast modulators and photodetectors as those integrated on sub-µm SOI platforms. In this work, we monolithically integrated a fast horizontal PIN photodiode on the 3 µm SOI platform. The 3 dB cutoff frequency was 40 GHz and the responsivity was 1.0 A/W at -1 V bias and 1.55 µm wavelength. This high bandwidth indicates that the detector is limited by the transit time of the carriers over the i-region, rather than the junction capacitance. The electric field in the i-region at -1 V is sufficient to keep the carrier drift speed close to the maximum carriers velocity in Ge. The design of the 40 GHz PD included analytical calculations and numerical simulations. Physical dimensions of the detector were chosen so that they are compatible with the 3 µm SOI process flow and meet the bandwidth and responsivity targets. Germanium was selectively grown into cavities in the 3 µm SOI layer, leading to very low amount of stress-induced crystal defects. The Ge waveguide detector and the Si waveguides were patterned with a common hard mask to achieve self-alignment between them. The n- and p-contacts were directly made into Ge using Ti/Al metallization. The vertical sidewalls of the Ge detector were implanted in order to create a horizontal PIN structure. Due to high confinement of light into the 3 µm thick SOI and Ge waveguides, the 3 µm thick and 1 µm wide Ge detector could be made as short as 9 µm. This led to small junction capacitances. The electrical output pulse shape was not distorted by the slow diffusion current of electrons and holes because the incoming light does not enter the doped regions. The development of 40 GHz PDs was an important step in improving the feasibility of the 3 µm SOI platform in high-bandwidth applications. Figure 1

Transmission of NRZ data at 12.5 Gbit/s is demonstrated using a hybrid integrated silicon photonics optical interconnect. The interconnect comprises a dilute nitride quantum well electroabsorption modulator on GaAs substrate, which is optically coupled to large core Si waveguide.

Long-wavelength vertical-cavity surface-emitting lasers (LW-VCSELs) with emission wavelength in the 1.3$\mu$m region for intensity modulation/direct detection (IM/DD) optical transmissions, enable longer fiber reach compared to C-band VCSELs, thanks to the extremely low chromatic dispersion impact at that wavelength. A lot of effort has been recently dedicated to novel cavity designs in order to enhance LW-VCSELs modulation bandwidth to allow higher data rates. Another approach to further improve VCSEL-based intensity modulation speed consists of making use of dedicated driver circuits implementing feed forward equalization (FFE). In this manuscript we present a transmitter assembly incorporating a 4-channel 0.13-$\mu$m SiGe driver circuit wire-bonded to a novel dual 1.3$\mu$m-VCSEL array. The short-cavity Indium Phosphide (InP) Buried Tunnel Junction (BTJ) VCSEL design minimizes both the photon lifetime and the device parasitic currents. The integrated driver circuit requires 2.5 V supply voltage only due to the implementation of a pseudo-balanced regulator, it includes a 2-tap asymmetric FFE where magnitude, sign, relative delay and pulse width distortion (PWD) of the taps can be modified. Through the proposed transmitter, standard single-mode fiber reach of 20 km and 4.5 km respectively for 28 Gb/s and 40 Gb/s data rate has been demonstrated with state-of-the-art power consumption. Transmitter performance has been analyzed through pseudorandom bit sequences of both 27-1 and 231-1 length and the additional benefit due to the use of the driver circuit has been discussed in detail. A final comparison with state-of-the-art VCSEL drivers is also included.

We present results from 400G transceiver development based on the hybrid integration of vertical-cavity surface emitting lasers and photodiode arrays on 3 and 12 μm silicon-on-insulator (SOI) chips. The integration of waveguide circuits, amplifiers and modulators on SOI is also reported.