4 results on '"Thierno-Moussa Bah"'
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2. A CMOS Compatible Thermoelectric Device made of Crystalline Silicon Membranes with Nanopores
- Author
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Thierno-Moussa Bah, Stanislav Didenko, Di Zhou, Tianqi Zhu, Hafsa Ikzibane, Stephane Monfray, Thomas Skotnicki, Emmanuel Dubois, Jean-François Robillard, Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Université catholique de Lille (UCL)-Université catholique de Lille (UCL), Microélectronique Silicium - IEMN (MICROELEC SI - IEMN), Université catholique de Lille (UCL)-Université catholique de Lille (UCL)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), STMicroelectronics [Crolles] (ST-CROLLES), This work has received: (i) funding from STMicroelectronics-IEMN common laboratory, (ii) funding from the European Research Council under the European Community’s Seventh Framework Programme (FP7/2007-2013) ERC Grant Agreement no. 338179, (iii) support from the French RENATECH network, (iv) support from the NANO2017 program, and (v) support from the French government through the National Research Agency (ANR) under program PIA EQUIPEX LEAF ANR-11-EQPX-0025 and project TIPTOP ANR-16-CE09-0023., Laboratoire commun STMicroelectronics-IEMN T4, Renatech Network, ANR-11-EQPX-0025,LEAF,Plateforme de traitement laser pour l'électronique flexible multifonctionnelle(2011), ANR-16-CE09-0023,TIPTOP,Pointes hautement sensibles pour la microscopie thermique à l'échelle nanométrique(2016), and European Project: 338179,EC:FP7:ERC,ERC-2013-StG,UPTEG(2013)
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[SPI]Engineering Sciences [physics] ,Mechanics of Materials ,Mechanical Engineering ,General Materials Science ,Bioengineering ,General Chemistry ,Electrical and Electronic Engineering - Abstract
Herein, we report the use of nanostructured crystalline silicon as a thermoelectric material and its integration into thermoelectric devices. The proof-of-concept relies on the partial suppression of lattice thermal conduction by introducing pores with dimensions scaling between the electron mean free path and the phonon mean free path. In other words, we artificially aimed at the well-known ‘electron crystal and phonon glass’ trade-off targeted in thermoelectricity. The devices were fabricated using CMOS-compatible processes and exhibited power generation up to 5.5 mW cm−2 under a temperature difference of 280 K. These numbers demonstrate the capability to power autonomous devices with environmental heat sources using silicon chips of centimeter square dimensions. We also report the possibility of using the developed devices for integrated thermoelectric cooling.
- Published
- 2022
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3. Influence of amorphous layers on the thermal conductivity of phononic crystals
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Thierno-Moussa Bah, Konstantinos Termentzidis, Jean-François Robillard, Maxime Verdier, David Lacroix, Evelyne Lampin, Stanislav Didenko, Laboratoire Énergies et Mécanique Théorique et Appliquée (LEMTA ), Université de Lorraine (UL)-Centre National de la Recherche Scientifique (CNRS), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), Microélectronique Silicium - IEMN (MICROELEC SI - IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), Physique - IEMN (PHYSIQUE - IEMN), STMicroelectronics [Crolles] (ST-CROLLES), Centre d'Energétique et de Thermique de Lyon (CETHIL), Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS), IMPACT N4S, Renatech Network, Laboratoire commun STMicroelectronics-IEMN T4, ANR-15-IDEX-0004,LUE,Isite LUE(2015), European Project: 338179,EC:FP7:ERC,ERC-2013-StG,UPTEG(2013), Microélectronique Silicium - IEMN (MICROE SI - IEMN), Physique-IEMN (PHYSIQUE-IEMN), Centre National de la Recherche Scientifique (CNRS)-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Université de Lyon-Institut National des Sciences Appliquées (INSA)-Université Claude Bernard Lyon 1 (UCBL), and Université de Lyon
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Amorphous silicon ,Resistive touchscreen ,Materials science ,Silicon ,chemistry.chemical_element ,02 engineering and technology ,Surface finish ,021001 nanoscience & nanotechnology ,01 natural sciences ,Amorphous solid ,chemistry.chemical_compound ,Condensed Matter::Materials Science ,Membrane ,Thermal conductivity ,chemistry ,Phase (matter) ,0103 physical sciences ,[SPI.MECA.THER]Engineering Sciences [physics]/Mechanics [physics.med-ph]/Thermics [physics.class-ph] ,[PHYS.COND.CM-MS]Physics [physics]/Condensed Matter [cond-mat]/Materials Science [cond-mat.mtrl-sci] ,Composite material ,[SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics ,010306 general physics ,0210 nano-technology - Abstract
International audience; The impact of amorphous phases around the holes and at the upper and lower free surfaces on thermal transport in silicon phononic membranes is studied. By means of molecular dynamics and Monte Carlo simulations, we explore the impact of the amorphous phase (oxidation and amorphous silicon), surfaces roughness, and a series of geometric parameters on thermal transport. We show that the crystalline phase drives the phenomena; the two main parameters are (i) the crystalline fraction between two holes and (ii) the crystalline thickness of the membranes. We reveal the hierarchical impact of nanostructurations on the thermal conductivity, namely, from the most resistive to the less resistive: the creation of holes, the amorphous phase around them, and the amorphization of the membranes edges. The surfaces or interfaces perpendicular to the heat flow hinder the thermal conductivity to a much greater extent than those parallel to the heat flow.
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- 2018
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4. Fabrication of thin-film silicon membranes with phononic crystals for thermal conductivity measurements
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Maciej Haras, Jean-François Robillard, Valeria Lacatena, Emmanuel Dubois, Stephane Monfray, Thierno Moussa Bah, Stanislav Didenko, Thomas Skotnicki, Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), Microélectronique Silicium - IEMN (MICROE SI - IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), STMicroelectronics-IEMN Common Laboratory, European Research CouncilEuropean Research Council (ERC)European Commission [338179], Laboratoire commun STMicroelectronics-IEMN T4, Renatech Network, European Project: 338179,EC:FP7:ERC,ERC-2013-StG,UPTEG(2013), and Microélectronique Silicium - IEMN (MICROELEC SI - IEMN)
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Fabrication ,Materials science ,Silicon ,semiconductor materials measurements ,phonons ,chemistry.chemical_element ,02 engineering and technology ,fabrication ,010402 general chemistry ,01 natural sciences ,[SPI]Engineering Sciences [physics] ,Thermal conductivity ,Electrical resistivity and conductivity ,Seebeck coefficient ,Thermoelectric effect ,Electronic engineering ,thin film devices ,Electrical and Electronic Engineering ,Thin film ,business.industry ,silicon ,Thermoelectricity ,021001 nanoscience & nanotechnology ,Thermoelectric materials ,0104 chemical sciences ,Electronic, Optical and Magnetic Materials ,chemistry ,Optoelectronics ,0210 nano-technology ,business - Abstract
Thermoelectricity struggles with the lack of cheap, abundant, and environmentally friendly materials. Silicon could overcome this deficiency by proposing high harvested power density, simplicity, availability, harmlessness, CMOS compatibility, and cost reduction. However, despite its high Seebeck coefficient and electrical conductivity, silicon is an inefficient thermoelectric material due to a high thermal conductivity ( $\kappa $ ). Modern nano-fabrication techniques enable reduction of $\kappa $ in silicon through attenuation of thermal phonons. In this letter, the design and the fabrication of nanostructured material onto $\kappa $ measurement platforms are presented. The proposed fabrication process is versatile and ensures compatibility with CMOS technologies. The proposed devices enable precise $\kappa $ measurement owing to a careful management of thermal losses. Characterization resulted in a two-fold ( $\kappa =59\pm 10$ W/m/K) reduction below bulk value for a 54-nm-thick plain silicon membranes. Further reduction is measured at $\kappa =34.5\pm 7.5$ W/m/K for membranes with phononic crystals.
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- 2016
- Full Text
- View/download PDF
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