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47 results on '"Tewari, Suchismita"'

1. Impact of Technology Node on Low Power Analog Performance of AU-TFET: A Quantum-Inspired Study

Author

Das, Suman, Tewari, Suchismita, Chattopadhyay, Avik, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Li, Yong, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Oneto, Luca, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zamboni, Walter, Series Editor, Tan, Kay Chen, Series Editor, Dhar, Sourav, editor, Do, Dinh-Thuan, editor, Sur, Samarendra Nath, editor, and Imoize, Agbotiname Lucky, editor

Published
2025
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7. Impact of Channel Epilayer Induced Corner-Effect on the Sensing Performance of a Unique PTFET-Based Biosensor (Epi-PTFET-Biosensor)

Author

Gayen, Sanu, Tewari, Suchismita, Chattopadhyay, Avik, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Li, Yong, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Biswas, Abhijit, editor, Saxena, Raghvendra, editor, and De, Debashis, editor

Published
2021
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8. Minimization of Drain-End Leakage of a U-Shaped Gated Tunnel FET for Low Standby Power (LSTP) Application

Author

Das, Suman, Chattopadhyay, Avik, Tewari, Suchismita, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Nath, Vijay, editor, and Mandal, J.K., editor

Published
2021
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9. Comparative Study of Logic Performance of Hybrid CMOSFETs at Deca-Nanometer Regime

Author

De, Suchismita, Tewari, Suchismita, Biswas, Abhijit, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Nath, Vijay, editor, and Mandal, J. K., editor

Published
2021
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10. nTunnel FET (nTFET) Reliability Study Against Positive Bias Temperature Instability (PBTI) for Different Device Architectures

Author

Das, Suman, Chattopadhyay, Avik, Tewari, Suchismita, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Nath, Vijay, editor, and Mandal, J. K., editor

Published
2021
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11. Optimum Cavity Length of a pTFET-Based Biosensor for Successful and Accurate Sensing of a Wide Range of Biomolecules

Author

Gayen, Sanu, Tewari, Suchismita, Chattopadhyay, Avik, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Nath, Vijay, editor, and Mandal, J. K., editor

Published
2021
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23. Investigations on the Logic Circuit Behaviour of Hybrid CMOSFETs Comprising InGaAs nMOS and Ge pMOS Devices with Barrier Layers

Author

Tewari, Suchismita, Biswas, Abhijit, Mallik, Abhijit, Angrisani, Leopoldo, Series editor, Arteaga, Marco, Series editor, Chakraborty, Samarjit, Series editor, Chen, Jiming, Series editor, Chen, Tan Kay, Series editor, Dillmann, Ruediger, Series editor, Duan, Haibin, Series editor, Ferrari, Gianluigi, Series editor, Ferre, Manuel, Series editor, Hirche, Sandra, Series editor, Jabbari, Faryar, Series editor, Kacprzyk, Janusz, Series editor, Khamis, Alaa, Series editor, Kroeger, Torsten, Series editor, Ming, Tan Cher, Series editor, Minker, Wolfgang, Series editor, Misra, Pradeep, Series editor, Möller, Sebastian, Series editor, Mukhopadhyay, Subhas Chandra, Series editor, Ning, Cun-Zheng, Series editor, Nishida, Toyoaki, Series editor, Panigrahi, Bijaya Ketan, Series editor, Pascucci, Federica, Series editor, Samad, Tariq, Series editor, Seng, Gan Woon, Series editor, Veiga, Germano, Series editor, Wu, Haitao, Series editor, Zhang, Junjie James, Series editor, and Nath, Vijay, editor

Published
2018
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25. Performance Study of DM-DG-OS JL-MOSFET based Biosensor in Detecting Charged Nanometric Biospecies.

Author

Tewari, Suchismita and Chattopadhyay, Avik

Subjects
*BIOSENSORS, *PERFORMANCE theory, *THRESHOLD voltage, *METAL oxide semiconductor field-effect transistors
Abstract

In this paper, for the first time, a dual-metal double-gate with oxide stack (low-k/high-k) junctionless MOSFET (DM-DG-OS JL-MOSFET) based sensor device has been explored for finding its suitability in detecting charged nanometric biospecies under dry environment condition. The analysis of sensing performance of the device for such detection is made in terms of the absolute and the relative changes in threshold voltage (Vth). The influence of work-function difference of dual metal gate electrodes, along with the position of nanogap cavity, on the sensing metrics has been thoroughly investigated. The impact of the cavity dimensions on sensitivity parameters of the projected device is also studied. An optimum cavity dimension, for channel length (Lch) of 1 µm, is found to be 400 nm × 10 nm in yielding measurable sensitivity parameters for charged nanometric biospecies detection. A device with 1-µm Lch exhibits superior sensitivity performance in terms of percentage improvements in the absolute and the relative changes in Vth for a higher drain-side gate-metal work-function (ϕM2) relative to source-side gate-metal work-function (ϕM1) for source-side cavity (400 nm × 10 nm) compared to the case when ϕM1>ϕM2 and the cavity is located near drain-side. Respective performance enhancements are found to be 30.7% and 74% for detection of negatively charged nanometric biospecies. The sensor devices with Lch of 50 nm show the similar trend. [ABSTRACT FROM AUTHOR]

Published
2024
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34. Asymmetric-Elevated-Source-Drain TFET: A Fairly Scalable and Reliable Device Architecture for Sub-400-mV Low-Stand-by-Power Digital Applications.

Author

Das, Suman, Chattopadhyay, Avik, and Tewari, Suchismita

Subjects
TUNNEL field-effect transistors, THRESHOLD voltage, ABSOLUTE value, DIGITAL technology, MULTICASTING (Computer networks)
Abstract

In this paper, silicon-based Asymmetric-Elevated-Source-Drain Tunnel Field-Effect Transistor (AESD-TFET), for gate lengths (LGs), viz. 70, 45, 32, 22, and 13 nm, is investigated for the first time to find its suitability in sub-400-mV low-stand-by-power (LSTP) digital operation, followed by finding its reliability and stability against the adverse effect of Positive Bias Temperature Instability (PBTI) for LG = 13 nm corresponding to the (recent) state-of-the-art technology node for the "More Moore" options in realizing LSTP digital functions. The whole work is executed with the help of 2-D numerical methods, via a model-calibration against a couple of experimental works on Elevated-Drain TFET (ED-TFET) and Elevated-Source TFET (ES-TFET), respectively, followed by a comparison of performances between the three, in terms of threshold voltage (VT), average subthreshold swing (SSavg), OFF-state current (IOFF), ION/IOFF ratio, OFF-state leakage power, and drain-induced barrier lowering (DIBL), and then a measurement of shifts in VT, IOFF, ION/IOFF, and SSavg for different PBTI stress conditions for temperature ≥ 300 K. For the optimum value of LG (i.e. 13 nm), a reduction of 56% and 66% in DIBL, a drop of 15.84% and 45.74% in SSavg, a reduction of about 1 decade and 3 decades in IOFF, and an improvement of nearly 1 decade and 2 decades in ION/IOFF have been obtained for the AESD-TFET against the ES- and ED-TFET devices, respectively. The same has also been found to show maximum stability against the PBTI effect under the two-temperature conditions (i.e. 300 K and 398 K) in terms of IOFF, ION/IOFF and SSavg with the lowest possible shifts in VT (∼ 0%) and SSavg (9%), besides maintaining the most excellent absolute values of the aforesaid parameters. [ABSTRACT FROM AUTHOR]

Published
2022
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35. Enhancement of pH-sensitivity using In0.53Ga0.47As channel ion-sensitive-field-effect-transistors.

Author

Mondal, Nabanita, Tewari, Suchismita, and Biswas, Abhijit

Subjects
THRESHOLD voltage, NUMERICAL analysis, TRANSISTORS, VOLTAGE, DETECTORS
Abstract

In this paper, for the first time, a pH-sensor using an In0.53Ga0.47As based ion-sensitive-field-effect-transistor (ISFET) is proposed to show its superior sensing performance as compared to its equivalent Si counterpart. Extensive numerical analyses of the proposed In0.53Ga0.47As-ISFET are performed in order to extract various sensitivity parameters, e.g., threshold voltage sensitivity (Vth-sensitivity), ON-current sensitivity (ION-sensitivity), and gate-voltage sensitivity (VGS-sensitivity), followed by the performance comparison with the equivalent Si-ISFET sensor, the experimental data of which are used for calibration of the simulation framework. The obtained results show that the long-channel In0.53Ga0.47As-ISFET sensor exhibits 10, 962%, and 9.75% improvement for Vth-sensitivity, ION-sensitivity, and VGS-sensitivity respectively, compared to the equivalent Si-ISFET-sensor at supply voltage of 0.5 V. Furthermore, our findings reveal that a down-scaled ISFET, for instance, a 40-nm-In0.53Ga0.47As-ISFET sensor shows 26, 213% and 10.5% improvement of Vth-sensitivity, ION-sensitivity, and VGS-sensitivity, respectively at the same supply voltage compared to its equivalent Si ISFET sensor. [ABSTRACT FROM AUTHOR]

Published
2022
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37. Exploring p-channel TFET for Optimum Cavity-Length Window in Detecting a Wide Variety of Protein-Molecules with the Effect of Their Position Dependent Variability on Sensitivity.

Author

Gayen, Sanu, Tewari, Suchismita, and Chattopadhyay, Avik

Subjects
*TUNNEL field-effect transistors, *BIOSENSORS, *THRESHOLD voltage, *BIOMOLECULES, *DISCRETE element method
Abstract

The performance of a sub-100-nm gate-length p-channel TFET-based biosensor (pTFET-BS) covering a wide range of protein-molecules is presented, and for the first time the optimized length-range of the nanogap cavity of the biosensor through the modeling of the presence of discrete number of biomolecules, followed by shift-saturation in corresponding transfer characteristics, is reported in this paper. Furthermore, considering a real time process related over-etching effect, a variability study on the random position of the conjugated protein-molecules within the cavity, followed by a corresponding statistical analysis, are carried out. Results show that 85% to 95% (65–85%) of total combinations produce beyond 50% of maximum Vth- (IDS-) sensitivity values, ensuring stability and hence reliability of the proposed sensor device. [ABSTRACT FROM AUTHOR]

Published
2021
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