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We have experimentally clarified the origin of low-frequency noise, which limits the coherence-time in Si quantum bit (qubit), utilizing cryo-CMOS. At cryogenic temperature (2.5 K), significantly enhanced $1/f$ noise is observed in Si MOSFETs, while it is not seen at room temperature. Interface trap density dependence of noise in Si MOSFETs, changing the surface orientation, revealed that the cryogenic $1/f$ noise is governed by carrier number fluctuation and we identified that the origin of the $1/f\mathrm{noise}$ is interface trap at cryogenic temperature, for the first time. The present study demonstrates that the experiments using well-investigated MOSFETs can provide new knowledge on Si qubits, which it is hardly possible to investigate using Si qubit as itself.

We have quantitatively evaluated the interface trap density inside the conduction band (CB) of InxGa1-xAs metal-oxide-semiconductor (MOS) structures and have systematically investigated the impact of the interface traps inside the CB on the inversion-layer mobility in InxGa1-xAs MOS field-effect transistors with various interface structures. Furthermore, we have tried to clarify the physical origin of the interface traps inside the CB. It was found that a large number of interface traps are distributed inside the CB of InxGa1-xAs inducing Fermi level pinning (FLP), the energy level of which is tunable by changing the InxGa1-xAs MOS interface structures. Furthermore, it was clarified that FLP inside the CB degrades the mobility in the high inversion carrier concentration region. We also found from the obtained results and reported theoretical results that a possible physical origin of the interface traps inside the CB is As-As dimers formed at the interfaces.

MOSFETs using channel materials with high mobility and low effective mass have been regarded as strongly important for obtaining high current drive and low supply voltage CMOS under sub 10 nm regime. From this viewpoint, attentions have recently been paid to Ge and III–V channels. In this paper, possible solutions for realizing III–V/Ge MOSFETs on the Si platform are presented. The high quality III–V channel formation on Si substrates can be realized through direct wafer bonding. The gate stack formation is constructed on a basis of atomic layer deposition (ALD) Al 2 O 3 gate insulators for both InGaAs and Ge MOSFETs. As the source/drain (S/D) formation, Ni-based metal S/D is implemented for both InGaAs and Ge MOSFETs. By combining these technologies, we demonstrate successful integration of InGaAs-OI nMOSFETs and Ge p-MOSFETs on a same wafer and their superior device performance.

We have developed the transfer technology of thin post-silicon materials by utilizing high quality heteroepitaxial growth. The single crystal Germanium layer transfer with epitaxial lift-off (ELO) technique on arbitrary substrates has been demonstrated. We also present InGaAs-OI wafers by conventional bonding/etching technique and the low temperature fabrication of InGaAs nMOSFETs. Polyimide is newly implemented in InGaAs nMOSFET fabrication process as an adhesive and an insulating layer on Si.

We report the operation of sub-60-nm deeply scaled InGaAs- and InAs-on-insulator (-OI) MOSFETs on Si substrates with MOS interface buffer engineering and Ni-InGaAs metal source/drain (S/D). InAs-OI MOSFETs provide 400% Ion enhancement, compared with an In0.53Ga0.47As control device with the same drain-induced-barrier-lowering (DIBL) of 100 mV/V, which is attributable to the mobility enhancement and the S/D parasitic resistance (RSD) reduction. In addition, InAs-OI MOSFETs with the MOS interface buffers show excellent electrostatic characteristics. InAs-OI MOSFETs with a channel length (Lch) of 55 nm shows small DIBL of 84 mV/V and subthreshold slope (S.S.) of 105 mV/dec, both of which do not significantly degrade with a decrease of Lch, thanks to the extremely thin channel thickness. In addition, from the simulation study, we have found that further vertical scaling and back biasing techniques can improve the control of short channel effect in InAs-OI MOSFETs.

In this paper, we study the electron transport properties of thin-body InxGa1-xAs-on-insulator (InxGa1-xAs-OI) metal-oxide-semiconductor field-effect transistors (MOSFETs) using two types of mobility enhancement engineering: an increase in the Indium (In) content of InGaAs channels and MOS interface buffer engineering. We have demonstrated a high peak mobility of 3180 cm2/(V·s) in our InAs-on-insulator (InAs-OI) MOSFETs, which were fabricated on Si substrates with MOS interface buffer layers by direct wafer bonding. The scattering mechanisms for the electron mobility in InxGa1-xAs-OI MOSFETs are systematically analyzed and identified. We conclude that the increase of the In content enhances phonon-limited mobility, whereas the use of the MOS interface buffer enhances thickness-fluctuation-limited mobility through the suppression of thickness fluctuation at the MOS interface.

The initial oxidation on high-index silicon surfaces with (113) and (120) orientations at 820 K has been investigated by real-time X-ray photoemission spectroscopy (Si 2p and O 1s) using 687 eV photons. The time evolutions of the Si n + ( n = 1–4) components in the Si 2p spectrum indicate that the Si 2 + state is suppressed on high-index surfaces compared with Si(001). The O 1s state consists of two components, a low-binding-energy component (LBC) and a high-binding-energy component (HBC). It is suggested that the O atom in strained Si O Si contributes to the LBC component. The reaction rates are slower on high-index surfaces compared with that on Si(001).

Reflectance difference spectroscopy (RDS) was applied to the characterization of SiO 2 /Si, GeO 2 /Ge, and high-k/III–V interface structures. We extended the spectral range of RDS to 8.4 eV in order to explore the optical transitions at the dielectrics–semiconductor interfaces as well as to have a high sensitivity to the interface anisotropy. Si surfaces with (110), (113), (331) and (120) orientations showed oxidation-induced RD changes in the vacuum-ultraviolet (VUV) range which were dependent on the surface orientation, oxidation method (dry or wet), and oxidation temperature. The Ge(110) surface also showed characteristic oxidation-induced changes in the VUV range, whereas Al 2 O 3 deposition on GaAs(001) and InP(001) surfaces induced only the RD amplitude changes.

New device engineering is indispensable in overcoming difficulties of advanced CMOS under 10 nm regime. Particularly, MOSFETs using the carrier-transportenhanced channels featuring low effective mass have been regarded as necessary for obtaining high current drive and low supply voltage [1]. From this viewpoint, strong attentions have recently been paid to III-V and Ge channels. Here, MOSFETs using these materials must be fabricated on Si substrates in order to fully utilize Si CMOS platform, meaning the necessity of the cointegration of III-V/Ge on Si. This heterogeneous integration is expected to realize novel LSIs utilizing a variety of device families along More-Moore, More-thanMoore and Beyond-CMOS approaches (Fig. 1). It should be noted here that, for logic CMOS applications under advanced technology nodes, ultrathin III-V-On-Insulator (III-V-OI) structures are needed, because advanced MOSFETs with short channel length needs to have ultrathin body or multi-gate structures such as FinFETs or nano-wire MOSFETs. Therefore, the requirements of IIIV-OI layers for logic CMOS applications are (1) high mobility (2) high thickness uniformity (3) superior interface properties at front and back MOS interfaces. The high quality III-V-OI formation on Si seems to be much more difficult than Ge, because several ways to form Ge films on Si such as selective growth on Si and the Ge condensation are already known. As for III-Vs, on the other hand, there can be two possible ways to form III-Vs on Si. One is the micro selective growth of III-V materials on Si, similar to Ge. Although this method is compatible with standard CMOS processes, the crystal quality and the interface properties between Si and III-V are still problematic. The other way is the wafer bonding of Si and III-V substrates, where is much better in terms of the III-V material quality than the selective growth. We have successfully fabricated In0.53Ga0.47As-onInsulator substrates by employing the direct bonding of InGaAs/InP wafers with Si substrates [2-5]. Here, ECRplasma SiO2 and ALD Al2O3 are used as buried-oxide (BOX) layers. In order to improve the bonding strength, ECR plasma treatment [2, 3, 5] or Ar beam irradiation [4, 5] is employed. By optimizing the deposition conditions of ECR-plasma SiO2 and ALD Al2O, it is possible to obtain superior III-V MOS interface properties at the front and back interfaces, which is important for ultrathin body planar MOSFET applications. Also, the preand postbonding annealing are important for reducing the number of voids and increasing the bonding strength, respectively. Fig. 2 shows an IR image of a 2-inch InGaAs/SiO2/Si wafer with smooth and flat interfaces. One characteristic of our wafer boding scheme is that ultrathin InGaAs layers can be formed easily by utilizing the high selective etching rate between InGaAs epitaxial layers and InP substrates by wet etching with low damage. Actually, we have successfully fabricated InGaAs-OI structures with the InGaAs thickness less than 10 nm. The normal III-V-OI MOSFET operation with AuGe S/D has been examined under back gate configuration. Fig. 3 shows the effective electron mobility with Al2O3 BOX. The electron mobility is significantly enhanced and the peak mobility of 1800 cm/Vs and the enhancement factor of 2.8 against the Si universal one are obtained with S treatment before bonding, confirming the importance of MOS interface quality on the mobility [4]. We have recently confirmed the front gate MOSFET operation [5]. In summary, we have developed high electron mobility InGaAs-On-Insulator MOSFETs with thicknesses from 100 nm to 10 nm, utilizing a direct wafer bonding technique with ECR SiO2 and ALD Al2O3 buried oxides. This technique is quite promising for CMOS device application under 15 nm technology node and beyond. This work was supported by Innovation Research Project on Nano electronics Materials and Structures from New Energy and Industrial Technology Development Organization. The authors would like to thank Prof. M. Sugiyama and N. Taoka in the University of Tokyo, Drs. N. Miyata, T. Maeda, H. Ishii and T. Itatani in AIST, Dr. A. Ohtake in NIMS and Drs. N. Fukuhara and H. Sazawa in Sumitomo Chemical for their collaborations.

Mobility enhancement technologies have currently been recognized as mandatory for future scaled MOSFETs. In this paper, we present the basic concept on the choice of channel materials for high performance MOSFETs and address the expectation of Ge/III-V MOSFETs on the Si platform. We briefly review the present status and the critical issues of Ge/III-V MOS devices. Several key technologies, which are expected to make this heterogeneous integration of Ge/III-V MOSFETs possible, are introduced.

Reflection high-energy electron diffraction (RHEED), reflectance difference spectroscopy (RDS), and scanning tunneling microscopy (STM) have been used to study the anisotropic kinetics on the growing Ge(0 0 1) surface. While switching of dimer direction in alternate (2 × 1)/(1 × 2) layers causes the bilayer-period oscillations in RD response, RHEED oscillations are governed by variations in surface step densities. We show that the RHEED oscillations are strongly affected by the growth front morphology: when the growth front becomes distributed over several layers, the transition from bilayer- to monolayer-period occurs in RHEED oscillations.

We studied the physical and electrical properties of direct-contact HfO2/Ge and HfO2/GeO2/Ge structures, and demonstrated the superiority of a direct-contact HfO2/Ge structure in the leakage current and EOT. The HfO2/Ge structure was thermally stable up to 700åC, whereas the interface GeO2 layer was decomposed by 400åC-annealing for the HfO2/GeO2/Ge structure, and the decomposed products diffused into the HfO2 film. Good leakage-current characteristics were obtained in the HfO2/Ge structure with reduced Ge diffusion. Moreover, we found that the HfO2/Ge structure effectively thinned EOT. We identified the existence of an electrostatic interface dipole with a voltage of ~0.8 V (negative charges on HfO2 and positive on Ge sides). However, a dipole similar to that in the HfO2/Ge structure was induced for the HfO2/GeO2/Ge structure after 400åC-annealing. We therefore suggested that a direct-contact HfO2/Ge interface was formed due to thermal decomposition of the interfacial GeO2 layer caused by the annealing.

We show that the bonding structures and electrical properties of the HfO2/GaAs interface can be controlled by a choice of the reconstruction on the initial GaAs surface. Electron-beam evaporation of HfO2 onto the c(4 × 4) surface yielded As–O bonds at the interface, while Ga–O bonds were dominant at the interfaces formed on the (2 × 4) and (4 × 6) surfaces. Influences of the initial surface reconstruction on the interface structure persisted even after annealing at 673 K. Electrical characterization of Ir/HfO2/GaAs capacitors indicated that the interfacial As–O bonds cause weak Fermi level pinning. It was also suggested that the interfaces dominated by the Ga–O bonds have trapping states in the upper half of the GaAs bandgap.

Tunnel FETs with vertical tunnel paths are fabricated and successfully modeled by the nonlocal band to band tunneling model. Although enhancement of ON currents are obtained by longer source gate overlap lengths, the increase of the ON current is less than proportional to the overlap lengths, because of non-uniformity of the band to band tunneling generation rates. The behavior of this type of tunnel FETs is precisely explained by the device simulation model. The key point is the peak generation rates at the source edge.

Vapor/liquid hybrid deposition (VALID) is a modified atomic layer deposition (ALD) method that combines adsorption of metal precursors from the vapor phase with their hydrolysis from the liquid phase. This paper is a report of the development of an automated VALID apparatus that performs the adsorption/hydrolysis processes with a reasonable throughput. HfO 2 films have been successfully produced with this automated system using Hf(O t C 4 H 9 ) 4 [hafnium tetra-tert-butoxide (HTB)]as the precursor. A brief discussion is given on the contribution of multilayer adsorption of HTB to the observed deposition rates.

We report position-specified fabrication of epitaxial Si grains on an amorphous thermal oxide layer on Si(001) substrates. This process takes advantage of unique features of surface-sensitive deposition chemistry and nanoscale oxidation phenomena. To make the grown grains epitaxial with respect to the Si substrate, growth was initiated from Si nanodots that had been isolated from the substrate by the oxidation of mushroom-shaped overgrown structures. The position of each grain is controlled by the use of a lithographically patterned mask layer. Mechanisms of the oxidation-induced nanodot isolation, which is a key step in this fabrication process, are discussed. The present technique is applicable to the integration of various single-crystal materials onto Si substrates.

Atomic-scale dynamics in thermal oxidation on Si(001) has been investigated by employing the reflectance difference (RD) oscillation technique. After reviewing the RD spectra reported for oxidized single-domain Si(001) surfaces, we report the results of dynamic measurements, which were carried out using a GaN semiconductor laser as the light source. RD traces show distinctly different behaviors depending on whether oxidation is in the passive (oxide growth) or active (etching) mode. The critical temperature-pressure conditions for onset of oxide growth have been identified. When oxide growth is continued to the second and subsequent layers, the RD amplitude shows oscillation from which we have extracted layer-specific kinetic parameters for the oxidation process.

We systematically investigated the oxygen diffusion in both amorphous and γ-Al2O3 films using 18O as a tracer and observing depth profiles by secondary ion mass spectroscopy. The oxygen diffusion coefficients for amorphous Al2O3 films were two or three orders of magnitude larger than those of the γ-Al2O3 films. The activation energies of about 1.2 eV for both films were considerably lower than those for bulk α-Al2O3. These results could be explained by the difference in Al2O3 structure: α-Al2O3 has a dense corundum structure while γ-Al2O3 has a defective spinel structure with cation site vacancies. We found that the amorphous Al2O3 films prepared by atomic layer deposition could function as a barrier layer against oxygen diffusion only within a limited range of heat treatment conditions.

The effect of precursor gas-phase concentration in atomic layer deposition (ALD) of Al2O3 on Si(001) using Al(CH3)3 and H2O was investigated. Film growth rate was found to vary with Al(CH3)3 and H2O partial pressure, indicating that the process operates in a regime where complete conversion of surface sites is not reached when reactions self-extinguish. Higher precursor concentrations lead to higher conversion of surface sites as evidenced by faster film growth per ALD cycle. However, higher H2O concentrations also result in increasing amounts of aluminum silicate at the Al2O3/Si(001) interface. In addition to lower dielectric constants, flatband voltages increase by 0.5–0.6 V. Flatband voltage did not depend on the thickness of the interfacial layer as films with comparable capacitance equivalent thickness and interfacial thicknesses ranging from 2.2 to 11.1 A yielded identical flatband voltages. Interfacial silicate could be eliminated completely by reducing the gas-phase concentration of H2O, permittin...

We have performed in situ and ex situ measurements of reflectance difference (RD) spectra for Cl-doped n-type ZnSe grown by molecular beam epitaxy. The linear electro-optic (LEO) effect (or Pockels effect) in the depletion layer induces characteristic RD features near the E1 and E1+Δ1 transition energy. The intensity of these features is correlated with the carrier concentration determined from capacitance–voltage measurements. A quantitative model is presented to explain the observed dependence of the LEO signal on the carrier concentration. This model quantitatively considers the effect of the finite surface state density. A good fit with the experimental results was obtained by assuming the surface state densities of 3.8×1013 and 2.6×1013 cm−2 eV−1, respectively, for in situ measurement of a Se-terminated surface at 300 °C and for ex situ measurement of an oxide-covered surface at room temperature.

A high diffusion coefficient (> 10 −10 cm 2 s −1 ) of free H atoms in hydrogenated amorphous silicon (a-Si:H) has been observed using in situ electron spin resonance (ESR). The experimental results show that dual H-diffusion paths for free-H diffusion and H inter-diffusion exist in an a-Si:H network. The light-soaking effect in a-Si:H is discussed in relation to these dual H-diffusion paths.

We report on the first observation of the processes of formation of interface dangling bond (Pb centers) during amorphous SiO2 thin-film growth on a clean Si(1 1 1) substrate. After initial termination of the surface dangling bonds on the clean surface, rapid formation of Pb centers was observed. Even for a few monolayers of a-SiO2 film ( 0.4 nm ), the number of Pb centers reached the same order of magnitude as that in thick a-SiO2 films. These results suggest that the interface defect density between Si and a-SiO2 originates statistically from the short-range chemical bonding configurations and not from the long-range accumulation of the structural misfits between the two materials.

Layer-by-layer oxidation of Si(001)-(2×1) surfaces was observed using the reflectance difference (RD) spectroscopy. Distinctive features in the RD spectra appeared near the E1 (3.3 eV) and E2 (4.2 eV) transition energies of Si. The polarity of these features was repeatedly reversed as the oxide thickness was increased to 4 monolayers (MLs). Oscillation of the RD amplitude near the E1 transition energy was observed in real time during the oxidation process. A half period of the oscillation corresponds to the oxidation of 1 ML. These results demonstrate the possibility of in situ counting and control of the number of oxidized layers.

This article describes an application of reflectance-difference (RD) spectroscopy, that is a surface-sensitive optical technique, to monitoring of the oxidation process on Si. The RD spectrum of a single-domain Si(001) surface shows repeated inversion of its polarity as oxidation proceeds in the layer-by-layer mode. Taking advantage of this oscillation, we have demonstrated in situ measurements of the oxide thickness with atomic-layer precision, which allows the determination of oxidation rate for each monolayer of Si. Such layer-resolved kinetic data will expectedly advance our understanding of the atomistic mechanisms of the oxidation processes.

The linear electro-optic (LEO) or Pockels coefficient above the fundamental edge E 0 of ZnTe has not been determined yet as far as we know. In this work, we have measured the LEO coefficient of ZnTe in the absorbing region by reflectance difference or reflectance anisotropy spectroscopy (RDS or RAS), and we have obtained two remarkable peaks near the E, and E 1 + Δ 1 critical points.

A clean and flat GaSb surface without native oxides has been attained by H2 plasma cleaning and subsequent in-situ N2 plasma nitridation process at 300 oC. The mechanisms of thermal desorption behavior of native oxides on GaSb have been studied by thermal desorption spectroscopy (TDS) analysis. The suitable heat treatment process window for preparing a clean GaSb surface is given. Auger electron spectroscopy (AES) analysis indicates that native oxides were completely removed on the GaSb surface after H2 plasma exposure and the pure nitridation of the clean GaSb surface was obtained at a relatively low temperature of 300 °C. This pure nitridation of GaSb have a possibility to be used as a passivation layer for high quality GaSb MOS devices.

This paper discusses the impact of the tunneling probability on the variability of tunnel field-effect transistors (TFETs). Isoelectronic trap (IET) technology, which enhances the tunneling current in TFETs, is used to suppress the variability of the ON current and threshold voltage. The simulation results show that suppressing the tunneling rate fluctuations results in suppression of the variability. In addition, a formula describing the relationship between the tunneling rate fluctuations and the electric field strength is derived based on Kane's band-to-band tunneling model. This formula indicates that the magnitude of the tunneling rate fluctuations is proportional to the magnitude of the fluctuations in the electric field strength and a higher tunneling probability results in a lower variability. The derived relationship is universally valid for any technologies that exploit enhancement of the tunneling probability, including IET technology, channel material engineering, heterojunctions, strain engineering, etc.

Electrical and physical characteristics of the Al"2O"3/InGaAs interfaces with (111)A and (100) orientations were investigated in an attempt to understand the origin of electron mobility enhancement in the (111)A-channel metal-insulator-semiconductor field-effect-transistor. The (111)A interface has less As atoms of high oxidation states as probed by X-ray photoelectron spectroscopy. The electrical measurements showed that energy distribution of the interface traps for the (111)A interface is shifted toward the conduction band as compared to that for the (100) interface. Laterally-compressed cross-section transmission electron microscopy images showed that the characteristic lengths of the interface roughness are different between the (111)A and (100) interfaces. The contributions of the Coulomb and roughness scattering mechanisms are discussed based on the experimental results.

MISFETs incorporating the InP/InGaAs buried channel showed a high peak mobility of 5500cm^2/Vs. Spillover of the inversion carriers from the buried channel to the MIS interface on the InP barrier layer caused drastic mobility degradation as the carrier concentration was increased. The spillover was evidenced by observing a negative transconductance and a kink in split capacitance-voltage curves. Remote scattering by the trapped charges at the MIS interface also reduced the mobility when the InP barrier layer was as thin as 2nm.

For the first time, we propose a new ON current boosting technology for TFETs utilizing an isoelectronic trap (IET), which is formed by introducing electrically inactive impurities. We have demonstrated tunneling current enhancement by 735 times in Si-based diodes and 11 times enhancement in SOI-TFETs owing to non-thermal tunneling component by the Al-N isoelectronic impurity complex. The IET technology would be a breakthrough for ON current enhancement by a few orders in magnitude in indirect-transition semiconductors such as Si and SiGe.

We have investigated the nucleation processes in chemical vapor deposition (CVD) of Si on SiO2 surfaces that were treated with different chlorosilane gases SiHnCl4−n, where n=0, 1, or 2. These gases chemisorb on the SiO2 surface in a self-limiting manner. At 493 K, the saturation coverage was reached at 4×108 L exposure for the SiH2Cl2 gas, and at 2×109 L for the SiHCl3 and SiCl4 gases. CVD of Si was carried out on the chlorosilane-saturated SiO2 surfaces using Si2H6 as a source gas at 853 K. It has been found that the SiCl4 and SiHCl3 treatments effectively passivate the nucleation centers on the SiO2 surfaces, while the SiH2Cl2 treatment drastically enhances Si nucleation. The reaction mechanisms causing these differences are discussed, considering the structural changes of the adsorbed chlorosilane fragments at the CVD temperature. Application of the SiCl4 treatment to the patterned SiO2 mask for selective-area epitaxial growth of Si is demonstrated.

This article reports a selective-area deposition process using chlorosilane-treated ultrathin SiO2 masks on which the patterns are directly defined by irradiation of a focused electron beam (EB). Three different chlorosilane gases (SiH2Cl2, SiHCl3, and SiCl4) were first adsorbed on the SiO2 surfaces, and the regions with reactive sites were defined by taking advantage of electron-stimulated desorption (ESD) of the surface adsorbates. For the SiHCl3- and SiH2Cl2-treated surfaces, the nucleation density was remarkably high in the EB-irradiated regions. Such nucleation enhancement was less significant for the SiCl4-treated surface. For the purpose of direct patterning and selective growth, we conclude that SiHCl3 is the optimum treatment gas because it effectively suppresses Si nucleation outside of the EB-irradiated patterns. The overall ESD sensitivity of the SiHCl3-adsorbed mask was 50 mC/cm2, and a significant nucleation enhancement was observed by irradiation of 7 mC/cm2. We also report an extension of ...

The initial adsorption processes of SiH2Cl2 on Si(111)-(7×7) and Si(100)-(2×1) surfaces have been investigated by using infrared absorption spectroscopy and scanning tunneling microscopy. We have found that dissociation reactions of SiH2Cl2 on these two surfaces are distinctively different. SiH2Cl2 adsorption on Si(111)-(7×7) takes place via Si–Cl bond breakage, while both Si–H and Si–Cl bonds of the SiH2Cl2 molecules are dissociated on Si(100)-(2×1).

Electron spin resonance (ESR) observation of dangling-bond states on the Si(111)- $(7\ifmmode\times\else\texttimes\fi{}7)$ surface is demonstrated for the first time. The ESR spectra clearly show that a reaction of molecular oxygen with the Si(111)- $(7\ifmmode\times\else\texttimes\fi{}7)$ surface is associated with the appearance of a new dangling-bond center at unreacted Si adatoms. Most of the oxidized surface sites do not show ESR signals, but in a minor part of the surface another new type of surface defect is detected. The well known ${P}_{b}$ center at the ${\mathrm{SiO}}_{2}/\mathrm{Si}$ interface is found to evolve at an oxide thickness as thin as 0.3 nm.

We report a new liquid-phase route for alkylation of a Si surface. A Cl-terminated Si(1 1 1) surface was first prepared by UV-assisted chlorination of a H-terminated Si substrate in a PCl 5 solution. Alkylation was accomplished by a reaction of the surface SiCl groups with n -C 4 H 9 Li under reflux condition. We have found that the C 4 H 9 -terminated surface exhibits a respectable stability in air. This alkylation technique is not only simple but also effective to reduce carbon and oxygen contamination, as compared to previously reported liquid-phase processes. The SiC bonds thus formed expectedly serve as a bridge between a rich variety in organic chemistry and advanced silicon technology.

The adsorption processes of Se on the GaAs(111)A surface have been systematically studied using reflection high-energy electron diffraction (RHEED), scanning tunneling microscopy (STM), X-ray photoelectron spectroscopy (XPS), and total-reflection-angle X-ray spectroscopy (TRAXS). We have found that a reconstructed structure of (2 3 ×2 3 ) –R30° is formed on the Se-adsorbed GaAs(111)A. A structure model has been proposed for the GaAs(111)A– (2 3 ×2 3 ) –R30°–Se surface, which consists of two Se trimers located at a hollow site of the GaAs(111)A surface and three Ga vacancies per unit cell. The proposed structure model sufficiently explains experimental data from RHEED, XPS, and STM, and satisfies electron counting requirements.

We have made for the first time electron spin resonance (ESR) measurements on Si(111)7×7 and Si(100)2×1 surfaces during the initial oxidation processes at room temperature. The present results clearly show that, at a very initial stage of oxidation of Si surfaces where only a few surface layers were oxidized, a variety of defects are formed that have not been seen in ex situ ESR studies of SiO 2 /Si structures.

We have carried out in situ measurements of optical anisotropy in the depletion layer of Cl-doped n-type ZnSe during molecular beam epitaxy. Reflectance difference (RD) spectroscopy was employed to measure the anisotropy which was induced by the linear electro-optic (LEO) effect. A power-law relation was obtained between the LEO signature near the E 1 and E 1 + Δ 1 transition energy and the carrier concentration determined from ex situ capacitance–voltage measurements. Using this result we are now able to measure and control the carrier concentration in situ and in real time during ZnSe growth. Quantitative relation between built-in electric field in the depletion layer and the amplitude of the LEO signature of the RD spectra is discussed.

We investigate growth conditions to obtain atomically flat ZnSe film surfaces on GaAs(001) without forming ZnSe-related dot structures. It is found that high temperature growth is favorable for the growth of ZnSe with a smooth surface. In order to prevent degradation of interface properties at high substrate temperature, two-step growth of ZnSe layers is employed, where a low-temperature growth step is followed by high temperature growth. The two-step process enables one to grow ZnSe with atomically flat surface without ZnSe-related dots structures. The formation of self-assembled ZnCdSe quantum dots (QDs) is achieved on such atomically surfaces. Typical QD size is: base diameter of 21±3 nm and height of 8±2 nm. Even at a total deposition of ZnCdSe of 3.5 monolayer (ML), the QD density is as low as ∼2.4 μm −2 . It is found that these QDs are formed on a ZnCdSe wetting layer whose thickness is at least 3 ML.

We have studied adsorption processes of Zn on the $\mathrm{GaAs}(001)\ensuremath{-}(2\ifmmode\times\else\texttimes\fi{}4)$ surface using reflection high-energy electron diffraction (RHEED) and total-reflection-angle x-ray spectroscopy in real time. A rocking-curve analysis of RHEED has been used to determine the atomic coordinates of both clean and Zn-adsorbed $2\ifmmode\times\else\texttimes\fi{}4$ surfaces. The analysis for the clean $2\ifmmode\times\else\texttimes\fi{}4$ surface $(\ensuremath{\beta}2$ phase) has shown that both As dimers in the outermost and third atomic layers are displaced upward from their bulk positions. When the $2\ifmmode\times\else\texttimes\fi{}4$ surface was exposed to a Zn beam, the Zn atoms are preferably adsorbed at Ga-vacancy sites in the missing dimer trenches of the $2\ifmmode\times\else\texttimes\fi{}4$ unit cell with site occupancies of \ensuremath{\sim}100% and \ensuremath{\sim}50% at 200 and 250 \ifmmode^\circ\else\textdegree\fi{}C, respectively.

Atomic layer epitaxy (ALE) processes of ZnSe on GaAs(0 0 1) have been studied by using reflection high-energy electron diffraction and total-reflection-angle X-ray spectroscopy in real time. We have obtained direct evidence that the growing film of ZnSe(0 0 1) changes its surface chemical composition during ALE growth, which corresponds to the alternate formation of the Se-stabilized (2×1) and Zn-stabilized c(2×2) reconstructions. The growth rate of ZnSe has been estimated to be about 0.5 BL per ALE cycle, which can be consistent with the previously proposed structure models for these reconstructed surfaces.

The adsorption of Se on the $\mathrm{GaAs}(111)A$ surface forms a well-ordered $(2\sqrt{3}\ifmmode\times\else\texttimes\fi{}2\sqrt{3})\ensuremath{-}R30\ifmmode^\circ\else\textdegree\fi{}$ reconstruction. We have proposed a structure model for the $\mathrm{GaAs}(111)A\ensuremath{-}(2\sqrt{3}\ifmmode\times\else\texttimes\fi{}2\sqrt{3})\ensuremath{-}R30\ifmmode^\circ\else\textdegree\fi{}$-Se surface, which consists of two Se trimers located at a hollow site of the $\mathrm{GaAs}(111)A$ surface and three Ga vacancies per unit cell. The proposed structure model sufficiently explains experimental data from reflection high-energy electron diffraction, x-ray photoelectron spectroscopy, and scanning tunneling microscopy, and satisfies electron counting requirements.

ZnSe/GaAs heterostructures have been studied using x-ray reflectivity. Two samples grown by molecular beam epitaxy (MBE) differed in initial growing conditions; the first was prepared by Se treatment of a GaAs substrate, and the second one was exposed to Zn before growth of the ZnSe film. The structure and morphology of the interface between the ZnSe film and GaAs substrate were investigated. The experimental x-ray reflectivity curves, measured at different wavelengths, were simulated using a distorted-wave Born approximation method. Fitting the experimental data indicated the presence of a Ga2Se3 transition layer between the ZnSe film and GaAs substrate for the Se-treated sample, confirming that Zn treatment during the MBE growing process improves the interface quality. Furthermore, the simulations indicated that the concentration of the Ga2Se3 was less than unity. From this, we propose that the transition layer is discontinuous, e.g., possesses an island-like morphology.

We evaluated the possibilities of preparing single analyte molecules on silicon surfaces for chemical analysis based on fluorescence measurement A single-molecule imaging technique involving far-field optical microscopy was used to visualize rhodamine B (rhB) molecules in submonolayers prepared on Si wafers. This technique revealed that fluorescence of solvent-free, adsorbed rhB molecules in submonolayers appeared in two different forms: isolated fluorescent spots in which a countable number of independent single rhB molecules were grouped together and diffused fluorescence in the region with no fluorescent spots. On the basis of the fluorescence imaging and time-resolved fluorometry of individual fluorescent spots, together with examination of light-scattering sites on Si wafers, we discussed the possibility that the isolated fluorescent spots occurred on crystal-originated sites dotted on Si wafers. Our findings should provide guiding principles for developing vials for single analyte molecules on Si surfaces.

Thin films of ZnSe are heteroepitaxially grown on GaAs{111}A, B-(2×2) surfaces. On the GaAs(111)A-(2×2) surface ZnSe grows in a biatomic layer-by-layer mode. Interestingly, at the very initial stage of ZnSe growth on GaAs(111)A, the growth rate increases and decreases with increasing Se to Zn flux ratio and ZnSe film thickness, respectively. On the other hand, ZnSe growth on GaAs(111)B-(2×2) proceeds in an island mode regardless of the flux ratio. A possible mechanism for the onset of such different growth modes is discussed.

The amorphous incubation layer commonly found in microcrystalline silicon (μc-Si:H) grown on insulating glass substrates by plasma-enhanced chemical vapor deposition has been successfully eliminated simply by dilution of the SiH 4 to a SiH 4 /H 2 flow ratio < 1/99. Using an amorphous layer free μc-Si:H as a seed an epitaxial-like growth of μc-Si:H was obtained. It is shown that, with the seeded growth scheme, one can grow amorphous layer free thin μc-Si:H films and control the crystallinity of the films with relative ease.