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This paper reports a non-recessed normally off AlGaN/GaN high-electron-mobility transistor (HEMT) with a charge trapping gate dielectric stack. The charge trapping gate dielectric stack featuring a low density of fixed positive charges consists of an O3-based Al2O3 tunneling layer and an O3-based HfO2 blocking layer, both deposited via atomic layer deposition. For HEMT with a 15 nm AlGaN barrier layer, a threshold voltage of 2.57 V and an on-resistance of 8.50 Ω × mm are achieved. For positive bias temperature instability (PBTI) testing, the electric field provided by the 15 nm AlGaN layer serves as a barrier to channel carriers, significantly enhancing the PBTI test stability. The optimized gate dielectric stack enables the fabrication of the non-recessed normally off metal–insulator–semiconductor-HEMT with enhanced threshold voltage (Vth) stability. [ABSTRACT FROM AUTHOR]

In this work, the DC performance and RF characteristics of GaN-based high-electron-mobility transistors (HEMTs) using the SiNx stress-engineered technique were systematically investigated. It was observed that a significant reduction in the peak electric field and an increase in the effective barrier thickness in the devices with compressive SiNx passivation contributed to the suppression of Fowler–Nordheim (FN) tunneling. As a result, the gate leakage decreased by more than an order of magnitude, and the breakdown voltage (BV) increased from 44 V to 84 V. Moreover, benefiting from enhanced gate control capability, the devices with compressive stress SiNx passivation showed improved peak transconductance from 315 mS/mm to 366 mS/mm, along with a higher cutoff frequency (ft) and maximum oscillation frequency (fmax) of 21.15 GHz and 35.66 GHz, respectively. Due to its enhanced frequency performance and improved pinch-off characteristics, the power performance of the devices with compressive stress SiNx passivation was markedly superior to that of the devices with stress-free SiNx passivation. These results confirm the substantial potential of the SiNx stress-engineered technique for high-frequency and high-output power applications, which are crucial for future communication systems. [ABSTRACT FROM AUTHOR]

This work demonstrates a high-performance monolithically integrated GaN inverters platform, which incorporates enhancement-mode (E-mode) and depletion-mode (D-mode) GaN high-electron-mobility transistors (HEMTs) simultaneously using an Al:HfOx-based charge trapping layer. The developed E-mode HEMT exhibits a positive threshold voltage of 2.6 V, a high ON–OFF current ratio of 1.9 × 108, a current density of 376 mA/mm, and an ON-resistance of 15.31 Ω·mm. Moreover, the direct-coupled field-effect-transistor logic (DCFL) GaN inverter was characterized with and without D-mode device threshold voltage (VTH) modulation, demonstrating improved output swing and switching threshold shift by proposed VTH modulation. The optimized DCFL GaN inverter manifests a switching threshold of 2.34 V, a logic voltage output swing of 4.98 V, and substantial logic-low and logic-high noise margins of 2.16 and 2.49 V, respectively, at a supply voltage of 5 V. These results present a promising approach toward realizing monolithically integrated GaN logic circuits for power IC applications. [ABSTRACT FROM AUTHOR]

In this work, high threshold voltage and breakdown voltage E-mode GaN HEMTs using an Al:HfOx-based charge trapping layer (CTL) are presented. The developed GaN HEMTs exhibit a wide threshold modulation range of ΔVTH ∼ 17.8 V, which enables the achievement of enhancement-mode (E-mode) operation after initialization process owing to the high charge storage capacity of the Al:HfOx layer. The E-mode GaN HEMTs exhibit a high positive VTH of 8.4 V, a high IDS,max of 466 mA/mm, a low RON of 10.49 Ω mm, and a high on/off ratio of ∼109. Moreover, the off-state breakdown voltage reaches up to 1100 V, which is primarily attributed to in situ O3 pretreatment effectively suppressing and blocking leakage current. Furthermore, thanks to the VTH of GaN HEMTs being tunable by initialization voltage using the proposed CTL scheme, we prove that the direct-coupled FET logic-integrated GaN inverters can operate under a variety of conditions (β = 10–40 and VDD = 3–15 V) with commendable output swing and noise margins. These results present a promising approach toward realizing the monolithic integration of GaN devices for power IC applications. [ABSTRACT FROM AUTHOR]

The piezoelectric thin film composed of single-crystal lithium niobate (LiNbO3) exhibits a remarkably high electromechanical coupling coefficient and minimal intrinsic losses, making it an optimal material for fabricating bulk acoustic wave resonators. However, contemporary first-order antisymmetric (A1) Lamb mode resonators based on LiNbO3 thin films face specific challenges, such as inadequate mechanical stability, limited power capacity, and the presence of multiple spurious modes, which restrict their applicability in a broader context. In this paper, we present an innovative design for A1 Lamb mode resonators that incorporates a support-pillar structure. Integration of support pillars enables the dissipation of spurious wave energy to the substrate, effectively mitigating unwanted spurious modes. Additionally, this novel approach involves anchoring the piezoelectric thin film to a supportive framework, consequently enhancing mechanical stability while simultaneously improving the heat dissipation capabilities of the core. [ABSTRACT FROM AUTHOR]

This work adopts interface charge engineering to fabricate normally off metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) on an in situ SiNx/AlGaN/GaN platform using an in situ O3 treatment performed in the atomic layer deposition system. The combination of in situ SiNx passivation and an O3-treated Al2O3/AlGaN gate interface allows the device to provide an excellent breakdown voltage of 1498 V at a low specific on-resistance of 2.02 mΩ cm2. The threshold voltage is increased by 2 V by significantly compensating the net polarization charges by more than five times with O3 treatment as well as reducing the interface traps and improving the high-temperature gate stability. Furthermore, a physical model of fixed charges at the Al2O3/AlGaN interface is established based on dielectric thickness-dependent linear fitting and numerical calculations. The matched device performance and simulated energy band bending elucidate the O3-treated fixed-charge modulation mechanism, providing a practical method for producing normally off GaN MIS-HEMTs. [ABSTRACT FROM AUTHOR]

In this work, a dramatic reduction in current collapse is achieved in GaN-based high-electron-mobility transistors (HEMTs) using dual-layer SiNx stressor passivation (DSSP), and the related mechanism is proposed. The SiNx compression neutralizes the inherent piezo polarization caused by the lattice mismatch at the heterojunction and effectively mitigates the peak electric field crowding at the drain-side gate edge, as supported by technology computer-aided design simulation. Thus, the inverse piezoelectric effect is suppressed and the trapped charge density is reduced under high electrical stress. As a result, the current collapse effect can be significantly restrained. Upon pulsing (Vg = −6 and Vds = 20 V), the device with DSSP exhibits a negligible current collapse (∼3%), which is significantly lower than the baseline device (∼34%). Moreover, it shows a one-order-of-magnitude reduction in gate leakage and a significant enhancement in gate stability. These results prove that the DSSP process is an attractive technique to facilitate high-reliability GaN-on-Si HEMTs. [ABSTRACT FROM AUTHOR]

In this work, we use Si/Tl5Al1/TiN for a source/drain ohmic contact to demonstrate an ultra-low contact resistance of 0.11 Ω mm (ρc = 2.62 × 10−7 Ω cm2) on non-recessed i-InAlN/GaN heterostructures. The Ti5Al1 alloy was used to suppress the out-diffusion of Al and extract N from the InAlN layer, which aided the formation of ohmic contact by improving the tunneling efficiency of electrons, as we have reported in the past work. A thin Si inter-layer combined with the Ti5Al1 alloy is proposed to further reduce contact resistance. A heavy n-type InAlN layer was obtained through doping with Si atoms to improve the tunneling transport of electrons. Furthermore, the TiN inclusions penetrated into the GaN channel because the in-diffused Si promoted the decomposition of GaN at a high annealing temperature and the in-diffused Ti reacted with GaN. These TiN inclusions provided direct contact with two-dimensional electron gas, offering an additional path for the injection of electrons into the channel. The tunneling and spike mechanism worked alternately to lower the contact resistance at different annealing temperatures (dividing at 900 °C), implying that the joint effect of tunneling and the spike mechanism was initially promoted in the formation of ohmic contact. The mechanism of this Si/Ti5Al1/TiN ohmic contact was fully understood through microscopic and thermodynamic analyses. These results shed light on the mechanism for the formation of ohmic contact in a gold-free metal stack for GaN-based HEMTs. [ABSTRACT FROM AUTHOR]