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InAs-On-Insulator (InAs-OI) structures fabricated by the Smart Cut process are promising for three-dimensional (3D) integration of complementary metal–oxide–semiconductor devices owing to the low thermal budget, high mobility, and low contact resistance. InAs-OI structures are also expected to reduce the leakage current and parallel conduction channels in InAs n-channel MOSFETs, which are serious problems. Smart Cut is a promising way to integrate III–V semiconductors on Si substrates for 3D integration. However, the electrical characterization of InAs-OI films realized by Smart Cut has not been reported yet. In addition, since InAs-OI's crystallinity is severely degraded by passage of a large amount of H+ ions in the Smart Cut process, we need to study the effects of thermal annealing on the electrical properties of the InAs-OI layers. It is found from the annealing temperature dependence of the electron concentration and the mobility that annealing at 500 °C significantly recovers InAs-OI crystallinity. Here, bulk and interface electrical properties are separately evaluated from the InAs-OI thickness dependence on the electron concentration and the sheet conductance. As a result, fabricated InAs-OI has the electron density of (6.3 ± 1.4) × 1017 cm−3 in the bulk region for an intrinsic donor InAs wafer and the high bulk mobility of 5800 ± 900 cm2/V s, indicating the high crystallinity of InAs-OI after 500 °C annealing. Also, the reusability of donor InAs wafers without degradation of InAs-OI film quality, which is one of the most important points for Smart Cut, is demonstrated by using (111) InAs donor wafers, attributed to much smoother (111) InAs-OI surfaces after splitting than (100) InAs-OI ones. [ABSTRACT FROM AUTHOR]

The effects of wet chemical treatments before treatment using (NH4)2S solutions in atomic layer deposition Al2O3/InGaAs metal-oxide-semiconductor (MOS) interfaces are experimentally examined. It is found that no chemical treatment before sulfur passivation leads to high interface state density (Dit) in spite of the (NH4)2S treatment. Furthermore, the value of Dit is dependent among the pretreatments using NH4OH, HCl, and BHF solutions before the sulfur treatment. HCl + (NH4)2S and BHF + (NH4)2S combinations show the lowest values of Dit. In addition, all of the Al2O3/InGaAs MOS interfaces with the sulfur treatment show a small amount of arsenic oxide. Thus, much higher Dit of the interfaces with the sulfur treatment indicates that the amount of arsenic oxide is not a deterministic factor for Dit. On the other hand, the amount of arsenic oxide before the sulfur treatment is found to correlate with Dit after sulfur treatment. Also, the interfaces with higher Dit after the sulfur treatment show a larger number of sulfur atoms remaining at the interfaces. These experimental results mean that there is a strong correlation among Dit, the amount of arsenic oxide, and the number of sulfur atoms remaining at the Al2O3/InGaAs interfaces. As a result, we can interpret for the present experimental results that the sulfur treatment can have two opposite impacts on Dit at the Al2O3/InGaAs interfaces: the decrease in Dit due to etching of native oxides and suppression of oxidation by sulfur passivation and the increase in Dit due to defect generation through some interaction between sulfur and arsenic oxide. [ABSTRACT FROM AUTHOR]

The relationship between substrate hole currents and interface state generation in Al2O3/InGaAs n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) is experimentally studied for the MOSFETs with three different Al2O3 thicknesses of 3.2, 5.2, and 8.2 nm. The constant positive gate bias stress is applied. Then, the substrate hole current, monitored in the carrier separation setup, is clearly observed for the InGaAs n-channel MOSFETs. It is found that the density of the generated interface states (ΔDit) is uniquely represented as a function of the total hole fluence (Nhole), given by integrating the substrate hole current over time, not the total electron fluence. This experimental result strongly supports that interface state generation is triggered by holes induced by electrical stress, regardless of the thickness of Al2O3. It is also found that ΔDit in 3.2- and 5.2-nm-thick Al2O3 MOSFETs, expressed by the universal single line against Nhole, is lower than that in 8.2-nm-thick Al2O3 MOSFETs, which can be explained by the difference of the origin of the hole generation in the Al2O3/InGaAs metal-oxide-semiconductor interface. Judging from the similarity of these features with ΔDit in SiO2/Si n-MOSFETs reported previously, the Al2O3/InGaAs interfaces have the same physical origin of interface state generation as SiO2/Si interfaces. [ABSTRACT FROM AUTHOR]