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A systematic study of the formation of the tunnel‐junction for perovskite/TOPCon tandem solar cells is presented, which consists of a B‐doped poly‐Si (p+‐poly‐Si) and P‐doped poly‐Si (n+‐poly‐Si) double‐layer structure. The rear emitter double‐side TOPCon solar cell is selected as the bottom cell in tandem solar cells, where a p+‐poly‐Si/SiOx forms the rear emitter and an n+‐poly‐Si/SiOx forms the front field with the poly‐Si layer deposited by plasma‐enhanced vapor deposition (PECVD) and crystallized in a furnace. The tunnel‐junction is formed by depositing an additional B‐doped a‐Si:H (p+‐a‐Si:H) on the front n+‐poly‐Si and following a rapid thermal anneal (RTA) to partially crystallize the p+‐a‐Si:H with minimized interdiffusion of B and P. The tunnel‐junction is systematically optimized and it is found that the RTA process at 700 °C produces the optimized tunnel‐junction with the minimal contact resistivity of ≈16 mΩ cm2. The tunnel‐junction formation affects the passivation of the front field TOPCon, but the losses in the passivation quality can be recovered by a forming gas annealing. This process provides a simple and useful method for making the tunnel‐junction in perovskite/TOPCon tandem solar cells. [ABSTRACT FROM AUTHOR]

High power laser transmission is being intensively researched as a potential solution to transfer power to remote systems, being the power converter (PC) one of the main limiting factor to improve the system efficiency ($\eta $). Current PCs are mostly horizontal structures in which the $\eta $ heavily decreases at large input power. In this work, we propose a novel GaAs-based vertical-tunnel-junction (VTJ) PC suitable for ultra-high (UH) input power density (Pin). This structure does not suffer from $\eta $ degradation at high Pin because it is designed to have low current density, high output voltage and reduced series resistance (~ 2 orders of magnitude lower than the state-of-the-art PCs). We have demonstrated increasing $\eta $ with Pin, reaching values higher than 76% at 3000 $\text{W}\cdot $ cm−2. This vertical-based architecture enables a new set of potential applications for wireless PC to power remote systems with $\eta $ exceeding today’ s state-of-the-art PC designs. [ABSTRACT FROM AUTHOR]

Ferroelectric memories have made big advancements in the last years due to the discovery of ferroelectricity in already widely used hafnium oxide. Here we investigate ferroelectric tunnel junctions (FTJ) consisting of a ferroelectric hafnium zirconium oxide layer and a dielectric aluminum oxide layer. By varying the set and reset amplitude and pulse width the fraction of reversed ferroelectric domains can be controlled. Due to the statistical distribution of the coercive voltage the current can be tuned between the minimum off-state and maximum on-state current. This leads to possible multi-level information storage in our FTJs. In this paper a detailed study of the set/reset operation and the intermediate current levels is presented. Furthermore, the endurance properties of the memory device can be directly correlated to the wake-up and fatigue phenomena in the ferroelectric layer. While the usability of the memory window is still limited by the initial polarization increase and ultimately by the hard breakdown of the device, a further optimization of the ferroelectric layer itself and the ferroelectric/dielectric interface can directly improve the viability of the tunnel junction. Finally, we show that the current of our FTJs scales as expected and reproducible results across different devices are obtained.

The discovery of ferroelectric (FE) properties in binary oxides has enabled CMOS compatible and scalable FE memories. Recently, we reported a simple approach to introduce non-volatility into state-of-the-art dynamic random-access memory stacks that show anti-FE (AFE) behavior. By employing a pair of electrodes with different work functions, a built-in bias is generated. Consequently, this bias modulates the energy potential of the AFE and enables two stable non-volatile states. Using this approach, a significant endurance improvement compared to hafnia-based FE memories can be obtained. In this paper, we investigate the possibility to bypass the usage of asymmetric workfunction electrodes. Using the interface-engineering approach, based on fixed charge or dipole formation, we show two additional methods for built-in bias generation within AFE layer stacks. By characterizing the film properties and performance of AFE capacitors, we compare and investigate retention and endurance of both work function-difference-based and interface-based AFE non-volatile memory. Finally, for the first time we present the concept of a binary oxide-based AFE tunnel junction that leverages both an interface and work function engineered AFE stack.

Scanning Tunneling Microscopy (STM) is a technique where the surface topography of a conducting sample is probed by a scanning metallic tip. The tip-to-surface distance is controlled by monitoring the electronic tunneling current between the two metals. The aim of this work is to extend the temporal range of this instrument by characterising the time fluctuations of this current on different surfaces. The current noise power spectral density is dominated by a characteristic 1/f component, the physical origin of which is not yet clearly identified, despite a number of investigations. A new I-V preamplifier was developed in order to characterise these fluctuations of the tunnelling current and to obtain images of their spatial repartition. It is observed that their intensity is correlated with some topographical features. This information can be used to get insights on the physical phenomena involved that are not accessible by the usual STM set-up, which is limited to low frequencies.

GaN-based light-emitting diodes (LEDs) exhibit a severe efficiency droop with increasing current density. This paper analyses a new approach to circumvent the droop problem by inserting tunnel junctions into the multi-quantum well (MQW) active region, resulting in carrier recycling, a more uniform MQW carrier distribution, and less carrier loss. Self-consistent numerical simulations of such bipolar-cascade LED with four stages predict a quantum efficiency of 250 % at low power and still more than 100 % at high power, despite additional light absorption at the tunnel junctions. [ABSTRACT FROM AUTHOR]

Abstract: We consider the Dirac particle that lives in the 1-dimensional configuration space consisting of two quantum wires and a junction between the two. We regard the spin of a Dirac particle as spintronic qubit. We give concrete formulae explicitly expressing the one-to-one correspondence between every self-adjoint extension of the minimal Dirac operator and its corresponding boundary condition of the wave functions of the Dirac particle. We then show that all the boundary conditions can be classified into just two types. The two types are characterized by whether the electron passes through the junction or not. We also show how the tunneling produces its own phase factor and what is the relation between the phase factor and the spintronic qubit in the tunneling boundary condition. [Copyright &y& Elsevier]

Abstract: We present our research and development of fabricating μc-Si:H bottom cells on a-Si:H/a-Si:H double-junction solar cells made in a commercial production line to make a-Si:H/a-Si:H/μc-Si:H triple-junction solar cells. The μc-Si:H bottom cells were deposited in a single-chamber system. We studied the n/p tunnel junction between the a-Si:H middle and μc-Si:H bottom cells by optimizing the hydrogen plasma treatment time, the μc-Si:H n layer, and the μc-Si:H p layer. We found that a proper combination of the three key elements can form a high-quality n/p tunnel junction with electrical and optical properties suitable for the triple-junction solar cells. We used the optimized n/p tunnel junction in a-Si:H/a-Si:H/μc-Si:H p–i–n-type triple-junction solar cells and improved the cell performance significantly, mainly from the increased open-circuit voltage and fill factor. We further optimized the μc-Si:H bottom cells. Combining the optimized n/p tunnel junction and high performance μc-Si:H bottom cell, we made a-Si:H/a-Si:H/nc-Si:H triple-junction solar cells having an initial efficiency of 8.85%, which is 21% higher than the conversion efficiency of the a-Si:H/a-Si:H tandem solar cells from the current production line. [Copyright &y& Elsevier]

In this study, performance and characteristics of blue InGaN tunnel‐junction light‐emitting diode (TJ LED) are investigated theoretically. Simulation results show that, dissimilar to the single LED, Shockley‐Read‐Hall (SRH) and Auger recombination are critical issues influencing the output performance of blue TJ LEDs in both low and high current regions. In realizing high‐performance TJ LEDs, to pursue the advantages of both satisfactory crystalline quality and suppressed SRH recombination loss, a simplified structure with single quantum well and without electron‐blocking layer is proposed as the unit LED structure that is utilized to stack the TJ LED. Simulation results indicate that the TJ LED with simplified unit LED structure possesses good performance at high output power, which provides a practical and cost‐effective way for the fabrication of TJ LEDs, especially when more unit LEDs need to be cascaded. The present work reveals that Shockley‐Read‐Hall (SRH) and Auger recombination are critical issues influencing the output performance of blue tunnel‐junction light‐emitting diodes (TJ LED) in low and high current regions. To pursue both satisfactory crystalline quality and suppressed SRH recombination, simplified structure is investigated. The TJ LED with simplified unit LED structure is proven to possess excellent performance, which provides a practical and cost‐effective way for real fabrication. [ABSTRACT FROM AUTHOR]