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In summary, an optical memory smart pixel array had been designed and fabricated. The functions and performance of this device had been tested and confirmed. We demonstrated a smart pixel capable of storing 4 pages of 32-bit memory with parallel operation of the smart pixel array at clock rates up to 277 MHz.

Combining the parallelism and connectivity of optics with electronics in smart pixel systems requires the development of robust and reliable optical systems. This is an important issue as the solutions to many applications must be implemented in harsh or variable environments. In addition, the combination of electronic boards that are relatively placement insensitive with optical systems that demand accurate positioning to obtain high performance, requires methods by which these demands can be fulfilled. Most bulk optical imaging systems utilizing custom and off-the-shelf optics and optomechanics can provide some solutions to optical interconnections in laboratory experiments and subsystem demonstrations. However, there are optical and size limitations to classical imaging techniques that can be overcome with the use of hybrid bulk and micro optic imaging. Use of large arrays of microlenses is an effective method of interconnecting large dilute arrays of smart pixels. The micro channel technique for 4-f imaging of focal spot arrays and device planes establishes a single optical path for each channel in the array. This type of one-to-one imaging may be usefully implemented in various imaging systems. In particular, relaying optical data from chips mounted on electronic boards. In addition to simple one to one imaging, arrays of focal spots originating from different sources must be combined together. For example, signal inputs incident a smart pixel array must be combined with the clock array that is used to read the state of the devices. We have investigated and developed passive and active alignment techniques applied to the construction of these hybrid optical components and have fabricated hybrid micro-channel beam combining units that have been integrated into a smart pixel transmitter array subsystem demonstration [1].

Smart pixel systems that utilize a ring architecture to interconnect arrays of optical modulators or emitters have applications in optical memory interconnects, large ATM switches and interconnects between the processors of supercomputers. In this type of system, point to point optical interconnections enable the parallel transfer of arrays of optically encoded data between several device planes organized in a ring topology. One of our primary motivations in developing this architecture is to enable two-dimensional planes of digitally encoded data that is output from a volume optical storage subsystem, to be transferred with high bandwidth to a combination of processors and memories. Many applications utilizing these upcoming high density, high capacity, fast access storage subsystems will combine a number of storage units with multiple heterogenous processing units with high bandwidth, parallel interconnects. We have focused on developing a generic, high bandwidth, free-space parallel interconnect that could be applied to providing interconnections between page-oriented optical memories and both optoelectronic and electronic processors. The advantages of a parallel free-space approach for interconnection of high performance memories are the high spatial bandwidth of the interconnect, similarity of storage and transfer formats, low crosstalk between data channels, electrical isolation and immunity to electrical interference.

Recent developments in smart pixel device fabrication has enabled researchers to design and develop optoelectronic systems that utilize the parallelism and connectivity of optics with electronic control and processing. It is necessary for users of these devices to have the capability of testing the components at various stages of the development. In particular, the AT&T/ARPA CO-OP FET-SEED platform has enabled groups in the community such as ourselves to work on our own smart pixel device designs in a co-operative workshop [1,2]. We have developed and are using a custom optical and electronic probe station for the testing of smart pixel devices. The test station allows us to input and extract optical and electronic signals from the various parts of the smart pixels in order to characterize their behavior and performance. This feedback is essential for device and system development.

Development of robust and reliable optical systems is essential in order to utilize the connectivity and parallelism of optics in conjunction with electronics in smart pixel information processors. Bulk optical imaging systems utilizing custom and off-the-shelf optics and optomechanics can provide some solutions to optical interconnections in laboratory experiments and system demonstrations. However, there are optical and size limitations to classical imaging techniques that can be overcome with the use of hybrid bulk and micro optic imaging. Use of large arrays of microlenses is an effective method of interconnecting large dilute arrays of smart pixels. The micro channel technique for 4-f imaging of focal spot arrays and device planes establishes a single optical path for each channel in the array. This type of one-to-one imaging may be usefully implemented in various imaging systems. In addition to simple one to one imaging, arrays of focal spots originating from different sources must be combined together. For example, signal inputs incident a smart pixel array must be combined with the clock array that is used to read the state of the devices. We have investigated bulk and microoptic components and subsystems to be applied to optical computing applications. This has involved study of the practical and theoretical performances of the various components. The progression of our work in implementing free-space smart pixel imaging systems establishes the techniques that will utilize micro optical components in practical system subassemblies.

An optical logic system is being developed to test the packaging and operation of free space optical logic systems. It uses symmetric-self-electro-optic effect devices as the logic elements and vertical cavity surface emitting lasers (VCSELs) to provide the optical inputs. This paper discusses the issues involved with incorporating the VCSEL array into the system. Issues that are investigated include beam combining, electrical drive, and VCSEL polarization. We find that current experimental devices are appropriate for early system experiments although issues such a multimode operation and the resulting current dependent polarization need to be addressed for practical systems.

A circuit has been constructed that is based on a cellular logic image processor (CLIP) architecture. It uses two Self electro-optic effect device (S-SEED) arrays as logic devices, optically connected in a loop with a 1-D nearest neighbor interconnect. The circuit is programmable in NAND and NOR and can implement image processing algorithms on a 16 × 8 dual rail image input with a spatial light modulator. Construction and assessment of this basic circuit is to allow investigation into generic issues in optical and mechanical design of parallel optical information processors. This will allow the implementation of more complex circuit design by using application specific devices and various local and non-local interconnection schemes. Analysis of the circuit performance and tolerances will permit an optical implementation using larger arrays. Addressing these issues is important before the complexity of this type of system can be increased.

DNA sequence information underpins genetic research, enabling discoveries of important biological or medical benefit. Sequencing projects have traditionally used long (400-800 base pair) reads, but the existence of reference sequences for the human and many other genomes makes it possible to develop new, fast approaches to re-sequencing, whereby shorter reads are compared to a reference to identify intraspecies genetic variation. Here we report an approach that generates several billion bases of accurate nucleotide sequence per experiment at low cost. Single molecules of DNA are attached to a flat surface, amplified in situ and used as templates for synthetic sequencing with fluorescent reversible terminator deoxyribonucleotides. Images of the surface are analysed to generate high-quality sequence. We demonstrate application of this approach to human genome sequencing on flow-sorted X chromosomes and then scale the approach to determine the genome sequence of a male Yoruba from Ibadan, Nigeria. We build an accurate consensus sequence from >30x average depth of paired 35-base reads. We characterize four million single-nucleotide polymorphisms and four hundred thousand structural variants, many of which were previously unknown. Our approach is effective for accurate, rapid and economical whole-genome re-sequencing and many other biomedical applications.